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liteeth: fix example design generation and remove VivadoProgrammer from platfom. (TODO: remove others duplicates)

This commit is contained in:
Florent Kermarrec 2015-02-28 11:04:48 +01:00
parent 0dfca49e68
commit 2c3e8a2804
2 changed files with 7 additions and 33 deletions
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6
misoclib/com/liteeth/example_designs/make.py
View File

@ -8,7 +8,7 @@ from migen.fhdl import verilog, edif
from migen.fhdl.structure import _Fragment
from migen.bank.description import CSRStatus
from mibuild import tools
from mibuild.xilinx_common import *
from mibuild.xilinx.common import *
sys.path.append("../../../../") # Temporary
from misoclib.com.liteeth.common import *
@ -61,7 +61,7 @@ if __name__ == "__main__":
args = _get_args()
# create top-level Core object
target_module = _import("misoclib.liteeth.example_designs.targets", args.target)
target_module = _import("misoclib.com.liteeth.example_designs.targets", args.target)
if args.sub_target:
top_class = getattr(target_module, args.sub_target)
else:
@ -71,7 +71,7 @@ if __name__ == "__main__":
platform_name = top_class.default_platform
else:
platform_name = args.platform
platform_module = _import("misoclib.liteeth.example_designs.platforms", platform_name)
platform_module = _import("misoclib.com.liteeth.example_designs.platforms", platform_name)
platform_kwargs = dict((k, autotype(v)) for k, v in args.platform_option)
platform = platform_module.Platform(**platform_kwargs)

34
misoclib/com/liteeth/example_designs/platforms/kc705.py
View File

@ -1,35 +1,9 @@
from mibuild.generic_platform import *
from mibuild.crg import SimpleCRG
from mibuild.xilinx_common import CRG_DS
from mibuild.xilinx_ise import XilinxISEPlatform
from mibuild.xilinx_vivado import XilinxVivadoPlatform
from mibuild.programmer import *
def _run_vivado(cmds):
with subprocess.Popen("vivado -mode tcl", stdin=subprocess.PIPE, shell=True) as process:
process.stdin.write(cmds.encode("ASCII"))
process.communicate()
class VivadoProgrammer(Programmer):
needs_bitreverse = False
def load_bitstream(self, bitstream_file):
cmds = """open_hw
connect_hw_server
open_hw_target [lindex [get_hw_targets -of_objects [get_hw_servers localhost]] 0]
set_property PROBES.FILE {{}} [lindex [get_hw_devices] 0]
set_property PROGRAM.FILE {{{bitstream}}} [lindex [get_hw_devices] 0]
program_hw_devices [lindex [get_hw_devices] 0]
refresh_hw_device [lindex [get_hw_devices] 0]
quit
""".format(bitstream=bitstream_file)
_run_vivado(cmds)
def flash(self, address, data_file):
raise NotImplementedError
from mibuild.xilinx.common import CRG_DS
from mibuild.xilinx.ise import XilinxISEPlatform
from mibuild.xilinx.vivado import XilinxVivadoPlatform
from mibuild.xilinx.programmer import *
_io = [
("user_led", 0, Pins("AB8"), IOStandard("LVCMOS15")),