mirror of
https://github.com/enjoy-digital/litex.git
synced 2025-01-04 09:52:26 -05:00
misoclib: better organization (create cores categories: cpu, mem, com, ...)
This commit is contained in:
parent
6b93849a08
commit
2c51adcd68
162 changed files with 246 additions and 237 deletions
2
make.py
2
make.py
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@ -8,7 +8,7 @@ from migen.fhdl import simplify
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from misoclib.gensoc import cpuif
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from misoclib.cpu import CPU
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from misoclib.sdram.phy import initsequence
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from misoclib.mem.sdram.phy import initsequence
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from misoc_import import misoc_import
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@ -1,10 +1,10 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.mac import LiteEthMAC
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from misoclib.liteeth.core.arp import LiteEthARP
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from misoclib.liteeth.core.ip import LiteEthIP
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from misoclib.liteeth.core.udp import LiteEthUDP
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from misoclib.liteeth.core.icmp import LiteEthICMP
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.mac import LiteEthMAC
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from misoclib.com.liteeth.core.arp import LiteEthARP
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from misoclib.com.liteeth.core.ip import LiteEthIP
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from misoclib.com.liteeth.core.udp import LiteEthUDP
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from misoclib.com.liteeth.core.icmp import LiteEthICMP
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class LiteEthIPCore(Module, AutoCSR):
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def __init__(self, phy, mac_address, ip_address, clk_freq):
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@ -1,7 +1,7 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.com.liteeth.generic.packetizer import LiteEthPacketizer
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_arp_table_layout = [
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("reply", 1),
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@ -1,11 +1,11 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.generic.arbiter import Arbiter
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from misoclib.liteeth.generic.dispatcher import Dispatcher
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from misoclib.liteeth.core.etherbone.packet import *
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from misoclib.liteeth.core.etherbone.probe import *
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from misoclib.liteeth.core.etherbone.record import *
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from misoclib.liteeth.core.etherbone.wishbone import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.generic.arbiter import Arbiter
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from misoclib.com.liteeth.generic.dispatcher import Dispatcher
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from misoclib.com.liteeth.core.etherbone.packet import *
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from misoclib.com.liteeth.core.etherbone.probe import *
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from misoclib.com.liteeth.core.etherbone.record import *
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from misoclib.com.liteeth.core.etherbone.wishbone import *
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class LiteEthEtherbone(Module):
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def __init__(self, udp, udp_port):
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@ -1,7 +1,7 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.com.liteeth.generic.packetizer import LiteEthPacketizer
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class LiteEthEtherbonePacketPacketizer(LiteEthPacketizer):
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def __init__(self):
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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class LiteEthEtherboneProbe(Module):
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def __init__(self):
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@ -1,7 +1,7 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.com.liteeth.generic.packetizer import LiteEthPacketizer
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class LiteEthEtherboneRecordPacketizer(LiteEthPacketizer):
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def __init__(self):
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from migen.bus import wishbone
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class LiteEthEtherboneWishboneMaster(Module):
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@ -1,7 +1,7 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.com.liteeth.generic.packetizer import LiteEthPacketizer
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class LiteEthICMPPacketizer(LiteEthPacketizer):
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def __init__(self):
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@ -1,9 +1,9 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.core.ip.checksum import *
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from misoclib.liteeth.core.ip.crossbar import *
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from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.core.ip.checksum import *
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from misoclib.com.liteeth.core.ip.crossbar import *
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from misoclib.com.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.com.liteeth.generic.packetizer import LiteEthPacketizer
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class LiteEthIPV4Packetizer(LiteEthPacketizer):
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def __init__(self):
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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class LiteEthIPV4Checksum(Module):
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def __init__(self, words_per_clock_cycle=1, skip_checksum=False):
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@ -1,6 +1,6 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.generic.crossbar import LiteEthCrossbar
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.generic.crossbar import LiteEthCrossbar
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class LiteEthIPV4MasterPort:
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def __init__(self, dw):
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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class LiteEthTTYTX(Module):
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def __init__(self, ip_address, udp_port, fifo_depth=None):
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@ -1,8 +1,8 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.core.udp.crossbar import *
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from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.core.udp.crossbar import *
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from misoclib.com.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.com.liteeth.generic.packetizer import LiteEthPacketizer
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class LiteEthUDPPacketizer(LiteEthPacketizer):
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def __init__(self):
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@ -1,7 +1,7 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.liteeth.generic.crossbar import LiteEthCrossbar
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from misoclib.com.liteeth.generic.crossbar import LiteEthCrossbar
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class LiteEthUDPMasterPort:
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def __init__(self, dw):
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Before Width: | Height: | Size: 25 KiB After Width: | Height: | Size: 25 KiB |
Before Width: | Height: | Size: 12 KiB After Width: | Height: | Size: 12 KiB |
Before Width: | Height: | Size: 197 KiB After Width: | Height: | Size: 197 KiB |
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@ -11,7 +11,7 @@ from mibuild import tools
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from mibuild.xilinx_common import *
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sys.path.append("../../../") # Temporary
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from misoclib.liteeth.common import *
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from misoclib.com.liteeth.common import *
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def get_csr_csv(regions):
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r = ""
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@ -14,10 +14,10 @@ from litescope.bridge.uart2wb import LiteScopeUART2WB
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from litescope.frontend.la import LiteScopeLA
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from litescope.core.port import LiteScopeTerm
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.phy.gmii import LiteEthPHYGMII
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from misoclib.liteeth.core import LiteEthUDPIPCore
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.phy.gmii import LiteEthPHYGMII
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from misoclib.com.liteeth.core import LiteEthUDPIPCore
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class _CRG(Module):
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def __init__(self, platform):
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@ -2,11 +2,11 @@ from litescope.common import *
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from litescope.frontend.la import LiteScopeLA
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from litescope.core.port import LiteScopeTerm
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from targets.base import BaseSoC
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from misoclib.liteeth.core.etherbone import LiteEthEtherbone
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from misoclib.com.liteeth.core.etherbone import LiteEthEtherbone
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class EtherboneSoC(BaseSoC):
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default_platform = "kc705"
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@ -2,11 +2,11 @@ from litescope.common import *
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from litescope.frontend.la import LiteScopeLA
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from litescope.core.port import LiteScopeTerm
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from targets.base import BaseSoC
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from misoclib.liteeth.core.tty import LiteEthTTY
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from misoclib.com.liteeth.core.tty import LiteEthTTY
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class TTYSoC(BaseSoC):
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default_platform = "kc705"
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@ -2,8 +2,8 @@ from litescope.common import *
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from litescope.frontend.la import LiteScopeLA
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from litescope.core.port import LiteScopeTerm
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from targets.base import BaseSoC
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@ -1,5 +1,5 @@
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import socket, time
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from misoclib.liteeth.test.model.etherbone import *
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from misoclib.com.liteeth.test.model.etherbone import *
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SRAM_BASE = 0x02000000
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@ -1,4 +1,4 @@
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from misoclib.liteeth.common import *
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from misoclib.com.liteeth.common import *
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# Generic classes
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class Port:
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@ -1,9 +1,9 @@
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from collections import OrderedDict
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.generic.arbiter import Arbiter
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from misoclib.liteeth.generic.dispatcher import Dispatcher
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.generic.arbiter import Arbiter
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from misoclib.com.liteeth.generic.dispatcher import Dispatcher
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class LiteEthCrossbar(Module):
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def __init__(self, master_port, dispatch_param):
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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def _decode_header(h_dict, h_signal, obj):
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r = []
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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def _encode_header(h_dict, h_signal, obj):
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r = []
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@ -1,8 +1,8 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.mac.common import *
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from misoclib.liteeth.mac.core import LiteEthMACCore
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from misoclib.liteeth.mac.frontend.wishbone import LiteEthMACWishboneInterface
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.mac.common import *
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from misoclib.com.liteeth.mac.core import LiteEthMACCore
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from misoclib.com.liteeth.mac.frontend.wishbone import LiteEthMACWishboneInterface
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class LiteEthMAC(Module, AutoCSR):
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def __init__(self, phy, dw, interface="crossbar", endianness="big",
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@ -1,8 +1,8 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
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from misoclib.liteeth.generic.crossbar import LiteEthCrossbar
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.generic.depacketizer import LiteEthDepacketizer
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from misoclib.com.liteeth.generic.packetizer import LiteEthPacketizer
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from misoclib.com.liteeth.generic.crossbar import LiteEthCrossbar
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class LiteEthMACDepacketizer(LiteEthDepacketizer):
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def __init__(self):
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@ -1,6 +1,6 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.mac.core import gap, preamble, crc, padding, last_be
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.mac.core import gap, preamble, crc, padding, last_be
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class LiteEthMACCore(Module, AutoCSR):
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def __init__(self, phy, dw, endianness="big", with_hw_preamble_crc=True):
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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class LiteEthMACCRCEngine(Module):
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"""Cyclic Redundancy Check Engine
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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class LiteEthMACGap(Module):
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def __init__(self, dw, ack_on_gap=False):
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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class LiteEthMACTXLastBE(Module):
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def __init__(self, dw):
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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class LiteEthMACPaddingInserter(Module):
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def __init__(self, dw, packet_min_length):
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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class LiteEthMACPreambleInserter(Module):
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def __init__(self, dw):
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from migen.bank.description import *
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from migen.bank.eventmanager import *
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@ -1,6 +1,6 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.liteeth.mac.frontend import sram
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.mac.frontend import sram
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from migen.bus import wishbone
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from migen.fhdl.simplify import FullMemoryWE
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@ -1,5 +1,5 @@
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from misoclib.liteeth.common import *
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from misoclib.liteeth.generic import *
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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class LiteEthPHYGMIITX(Module):
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def __init__(self, pads):
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@ -1,5 +1,5 @@
|
|||
from misoclib.liteeth.common import *
|
||||
from misoclib.liteeth.generic import *
|
||||
from misoclib.com.liteeth.common import *
|
||||
from misoclib.com.liteeth.generic import *
|
||||
|
||||
class LiteEthPHYLoopbackCRG(Module, AutoCSR):
|
||||
def __init__(self):
|
|
@ -1,5 +1,5 @@
|
|||
from misoclib.liteeth.common import *
|
||||
from misoclib.liteeth.generic import *
|
||||
from misoclib.com.liteeth.common import *
|
||||
from misoclib.com.liteeth.generic import *
|
||||
|
||||
class LiteEthPHYMIITX(Module):
|
||||
def __init__(self, pads):
|
|
@ -1,5 +1,5 @@
|
|||
from misoclib.liteeth.common import *
|
||||
from misoclib.liteeth.generic import *
|
||||
from misoclib.com.liteeth.common import *
|
||||
from misoclib.com.liteeth.generic import *
|
||||
|
||||
class LiteEthPHYSimCRG(Module, AutoCSR):
|
||||
def __init__(self):
|
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