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tb/asmicon_wb: better access pattern

This commit is contained in:
Sebastien Bourdeauducq 2012-04-30 19:08:31 -05:00
parent 87ee4baaf0
commit 2ccdade88e
1 changed files with 10 additions and 1 deletions
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11
tb/asmicon/asmicon_wb.py
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@ -10,9 +10,18 @@ from common import sdram_phy, sdram_geom, sdram_timing, DFILogger
l2_size = 8192 # in bytes
def my_generator():
for x in range(100):
for x in range(20):
t = TWrite(x, x)
yield t
print(str(t) + " delay=" + str(t.latency))
for x in range(20):
t = TRead(x)
yield t
print(str(t) + " delay=" + str(t.latency))
for x in range(20):
t = TRead(x+l2_size//4)
yield t
print(str(t) + " delay=" + str(t.latency))
def main():
controller = ASMIcon(sdram_phy, sdram_geom, sdram_timing)