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lattice/common: add LatticeiCE40DDRInput, LatticeiCE40SDROutput and LatticeiCE40SDRInput.

This commit is contained in:
Florent Kermarrec 2020-04-22 08:41:17 +02:00
parent 56e1528455
commit 2d25bcb09c
1 changed files with 57 additions and 14 deletions
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71
litex/build/lattice/common.py
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@ -1,4 +1,4 @@
# This file is Copyright (c) 2015-2019 Florent Kermarrec <florent@enjoy-digital.fr>
# This file is Copyright (c) 2015-2020 Florent Kermarrec <florent@enjoy-digital.fr>
# This file is Copyright (c) 2017 William D. Jones <thor0505@comcast.net>
# This file is Copyright (c) 2019 David Shah <dave@ds0.me>
# License: BSD
@ -142,10 +142,16 @@ class LatticeiCE40AsyncResetSynchronizerImpl(Module):
def __init__(self, cd, async_reset):
rst1 = Signal()
self.specials += [
Instance("SB_DFFS", i_D=0, i_S=async_reset,
i_C=cd.clk, o_Q=rst1),
Instance("SB_DFFS", i_D=rst1, i_S=async_reset,
i_C=cd.clk, o_Q=cd.rst)
Instance("SB_DFFS",
i_D= 0,
i_S= async_reset,
i_C= cd.clk,
o_Q= rst1),
Instance("SB_DFFS",
i_D = rst1,
i_S = async_reset,
i_C = cd.clk,
o_Q = cd.rst)
]
@ -154,7 +160,7 @@ class LatticeiCE40AsyncResetSynchronizer:
def lower(dr):
return LatticeiCE40AsyncResetSynchronizerImpl(dr.cd, dr.async_reset)
# iCE40 Trellis Tristate ---------------------------------------------------------------------------
# iCE40 Tristate -----------------------------------------------------------------------------------
class LatticeiCE40TristateImpl(Module):
def __init__(self, io, o, oe, i):
@ -162,7 +168,7 @@ class LatticeiCE40TristateImpl(Module):
if nbits == 1:
self.specials += [
Instance("SB_IO",
p_PIN_TYPE = C(0b101001, 6),
p_PIN_TYPE = C(0b101001, 6), # PIN_OUTPUT_TRISTATE + PIN_INPUT
io_PACKAGE_PIN = io,
i_OUTPUT_ENABLE = oe,
i_D_OUT_0 = o,
@ -173,7 +179,7 @@ class LatticeiCE40TristateImpl(Module):
for bit in range(nbits):
self.specials += [
Instance("SB_IO",
p_PIN_TYPE = C(0b101001, 6),
p_PIN_TYPE = C(0b101001, 6), # PIN_OUTPUT_TRISTATE + PIN_INPUT
io_PACKAGE_PIN = io[bit],
i_OUTPUT_ENABLE = oe,
i_D_OUT_0 = o[bit],
@ -193,16 +199,15 @@ class LatticeiCE40DifferentialOutputImpl(Module):
def __init__(self, i, o_p, o_n):
self.specials += [
Instance("SB_IO",
p_PIN_TYPE = C(0b011000, 6),
p_PIN_TYPE = C(0b011000, 6), # PIN_OUTPUT
p_IO_STANDARD = "SB_LVCMOS",
io_PACKAGE_PIN = o_p,
i_D_OUT_0 = i
)
]
self.specials += [
Instance("SB_IO",
p_PIN_TYPE = C(0b011000, 6),
p_PIN_TYPE = C(0b011000, 6), # PIN_OUTPUT
p_IO_STANDARD = "SB_LVCMOS",
io_PACKAGE_PIN = o_n,
i_D_OUT_0 = ~i
@ -215,14 +220,13 @@ class LatticeiCE40DifferentialOutput:
def lower(dr):
return LatticeiCE40DifferentialOutputImpl(dr.i, dr.o_p, dr.o_n)
# iCE40 DDR Output ---------------------------------------------------------------------------------
class LatticeiCE40DDROutputImpl(Module):
def __init__(self, i1, i2, o, clk):
self.specials += [
Instance("SB_IO",
p_PIN_TYPE = C(0b010000, 6),
p_PIN_TYPE = C(0b010000, 6), # PIN_OUTPUT_DDR
p_IO_STANDARD = "SB_LVCMOS",
io_PACKAGE_PIN = o,
i_CLOCK_ENABLE = 1,
@ -239,11 +243,50 @@ class LatticeiCE40DDROutput:
def lower(dr):
return LatticeiCE40DDROutputImpl(dr.i1, dr.i2, dr.o, dr.clk)
# iCE40 DDR Input ----------------------------------------------------------------------------------
class LatticeiCE40DDRInputImpl(Module):
def __init__(self, i, o1, o2, clk):
self.specials += [
Instance("SB_IO",
p_PIN_TYPE = C(0b000000, 6), # PIN_INPUT_DDR
p_IO_STANDARD = "SB_LVCMOS",
io_PACKAGE_PIN = i,
i_CLOCK_ENABLE = 1,
i_INPUT_CLK = clk,
o_D_IN_0 = o1,
o_D_IN_1 = o2
)
]
class LatticeiCE40DDRInput:
@staticmethod
def lower(dr):
return LatticeiCE40DDRInputImpl(dr.i, dr.o1, dr.o2, dr.clk)
# iCE40 SDR Output ---------------------------------------------------------------------------------
class LatticeiCE40SDROutput:
@staticmethod
def lower(dr):
return LatticeiCE40DDROutputImpl(dr.i, dr.i, dr.o, dr.clk)
# iCE40 SDR Input ----------------------------------------------------------------------------------
class LatticeiCE40SDRInput:
@staticmethod
def lower(dr):
return LatticeiCE40DDRInputImpl(dr.i, dr.o, Signal(), dr.clk)
# iCE40 Trellis Special Overrides ------------------------------------------------------------------
lattice_ice40_special_overrides = {
AsyncResetSynchronizer: LatticeiCE40AsyncResetSynchronizer,
Tristate: LatticeiCE40Tristate,
DifferentialOutput: LatticeiCE40DifferentialOutput,
DDROutput: LatticeiCE40DDROutput
DDROutput: LatticeiCE40DDROutput,
DDRInput: LatticeiCE40DDRInput,
SDROutput: LatticeiCE40SDROutput,
SDRInput: LatticeiCE40SDRInput,
}