platforms/versa_ecp5: remove Lattice Programmer (no longer used since we can now use OpenOCD).
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@ -233,58 +233,3 @@ class Platform(LatticePlatform):
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self.add_period_constraint(self.lookup_request("eth_clocks", 1).rx, 1e9/125e6)
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except ConstraintError:
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pass
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def create_programmer(self, with_ispclock=True):
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_xcf_ispclock = """
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<Device>
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<SelectedProg value="FALSE"/>
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<Pos>2</Pos>
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<Vendor>Lattice</Vendor>
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<Family>ispCLOCK</Family>
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<Name>ispPAC-CLK5406D</Name>
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<IDCode>0x00191043</IDCode>
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<Operation>Erase,Program,Verify</Operation>
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<Bypass>
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<InstrLen>8</InstrLen>
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<InstrVal>11111111</InstrVal>
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<BScanLen>1</BScanLen>
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<BScanVal>0</BScanVal>
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</Bypass>
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</Device>
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"""
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_xcf_template = """
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<?xml version='1.0' encoding='utf-8' ?>
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<!DOCTYPE ispXCF SYSTEM "IspXCF.dtd" >
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<ispXCF version="3.4.1">
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<Comment></Comment>
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<Chain>
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<Comm>JTAG</Comm>
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<Device>
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<SelectedProg value="TRUE"/>
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<Pos>1</Pos>
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<Vendor>Lattice</Vendor>
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<Family>ECP5UM5G</Family>
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<Name>LFE5UM5G-45F</Name>
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<IDCode>0x81112043</IDCode>
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<File>{{bitstream_file}}</File>
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<Operation>Fast Program</Operation>
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</Device>{ispclock}
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</Chain>
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<ProjectOptions>
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<Program>SEQUENTIAL</Program>
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<Process>ENTIRED CHAIN</Process>
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<OperationOverride>No Override</OperationOverride>
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<StartTAP>TLR</StartTAP>
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<EndTAP>TLR</EndTAP>
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<VerifyUsercode value="FALSE"/>
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</ProjectOptions>
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<CableOptions>
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<CableName>USB2</CableName>
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<PortAdd>FTUSB-0</PortAdd>
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<USBID>LATTICE ECP5_5G VERSA BOARD A Location 0000 Serial Lattice ECP5_5G VERSA Board A</USBID>
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</CableOptions>
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</ispXCF>
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""".format(ispclock=_xcf_ispclock if with_ispclock else "")
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return LatticeProgrammer(_xcf_template)
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