add --with-fpu flag to Naxriscv CPU
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@ -100,6 +100,7 @@ class NaxRiscv(CPU):
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cpu_group.add_argument("--with-jtag-instruction", action="store_true", help="Add a JTAG instruction port which implement tunneling for debugging (TAP not included)")
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cpu_group.add_argument("--with-jtag-instruction", action="store_true", help="Add a JTAG instruction port which implement tunneling for debugging (TAP not included)")
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cpu_group.add_argument("--update-repo", default="recommended", choices=["latest","wipe+latest","recommended","wipe+recommended","no"], help="Specify how the NaxRiscv & SpinalHDL repo should be updated (latest: update to HEAD, recommended: Update to known compatible version, no: Don't update, wipe+*: Do clean&reset before checkout)")
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cpu_group.add_argument("--update-repo", default="recommended", choices=["latest","wipe+latest","recommended","wipe+recommended","no"], help="Specify how the NaxRiscv & SpinalHDL repo should be updated (latest: update to HEAD, recommended: Update to known compatible version, no: Don't update, wipe+*: Do clean&reset before checkout)")
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cpu_group.add_argument("--no-netlist-cache", action="store_true", help="Always (re-)build the netlist")
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cpu_group.add_argument("--no-netlist-cache", action="store_true", help="Always (re-)build the netlist")
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cpu_group.add_argument("--with-fpu", action="store_true", help="Enable the F32/F64 FPU")
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@staticmethod
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@staticmethod
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def args_read(args):
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def args_read(args):
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@ -108,6 +109,7 @@ class NaxRiscv(CPU):
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NaxRiscv.jtag_instruction = args.with_jtag_instruction
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NaxRiscv.jtag_instruction = args.with_jtag_instruction
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NaxRiscv.update_repo = args.update_repo
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NaxRiscv.update_repo = args.update_repo
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NaxRiscv.no_netlist_cache = args.no_netlist_cache
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NaxRiscv.no_netlist_cache = args.no_netlist_cache
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NaxRiscv.with_fpu = args.with_fpu
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if args.scala_file:
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if args.scala_file:
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NaxRiscv.scala_files = args.scala_file
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NaxRiscv.scala_files = args.scala_file
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if args.scala_args:
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if args.scala_args:
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@ -256,6 +258,8 @@ class NaxRiscv(CPU):
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gen_args.append(f"--with-debug")
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gen_args.append(f"--with-debug")
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for file in NaxRiscv.scala_paths:
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for file in NaxRiscv.scala_paths:
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gen_args.append(f"--scala-file={file}")
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gen_args.append(f"--scala-file={file}")
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if(NaxRiscv.with_fpu):
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gen_args.append(f"--scala-args='rvf=true,rvd=true")
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cmd = f"""cd {ndir} && sbt "runMain naxriscv.platform.LitexGen {" ".join(gen_args)}\""""
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cmd = f"""cd {ndir} && sbt "runMain naxriscv.platform.LitexGen {" ".join(gen_args)}\""""
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print("NaxRiscv generation command :")
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print("NaxRiscv generation command :")
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