soc/do_finalize: check that crg.rst is a Signal before connecting to ctrl._reset.
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@ -939,6 +939,7 @@ class SoC(Module):
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# Connect SoCController's reset to CRG's reset if presents.
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if hasattr(self, "ctrl") and hasattr(self, "crg"):
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if hasattr(self.ctrl, "_reset") and hasattr(self.crg, "rst"):
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if isinstance(self.crg.rst, Signal):
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self.comb += self.crg.rst.eq(self.ctrl._reset.re)
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# SoC CSR bridge ---------------------------------------------------------------------------
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