build/lattice/common/LatticeECXTrellisImpl: add support for nbits == 1
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@ -44,8 +44,19 @@ lattice_ecpx_special_overrides = {
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class LatticeECPXTrellisTristateImpl(Module):
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class LatticeECPXTrellisTristateImpl(Module):
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def __init__(self, io, o, oe, i):
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def __init__(self, io, o, oe, i):
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nbits, sign = value_bits_sign(io)
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nbits, sign = value_bits_sign(io)
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for bit in range(nbits):
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if nbits == 1:
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# If `io` is an expression like `port[x]`, it is not legal to index further
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# into it if it is only 1 bit wide.
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self.specials += \
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self.specials += \
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Instance("TRELLIS_IO",
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p_DIR="BIDIR",
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i_B=io,
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i_I=o,
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o_O=i,
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i_T=~oe,
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)
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else:
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for bit in range(nbits):
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Instance("TRELLIS_IO",
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Instance("TRELLIS_IO",
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p_DIR="BIDIR",
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p_DIR="BIDIR",
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i_B=io[bit],
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i_B=io[bit],
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@ -54,6 +65,7 @@ class LatticeECPXTrellisTristateImpl(Module):
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i_T=~oe,
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i_T=~oe,
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)
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)
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class LatticeECPXTrellisTristate(Module):
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class LatticeECPXTrellisTristate(Module):
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@staticmethod
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@staticmethod
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def lower(dr):
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def lower(dr):
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