cpu/NaxRiscv crt0.S now enable the FPU
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@ -2,6 +2,11 @@
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.global isr
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.global _start
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#define MSTATUS_FS_INITIAL (1 << 13)
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#define MSTATUS_FS_CLEAN (2 << 13)
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#define MSTATUS_FS_DIRTY (3 << 13)
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#define MSTATUS_FS_MASK (3 << 13)
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_start:
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j crt_init
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nop
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@ -58,6 +63,10 @@ crt_init:
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la a0, trap_entry
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csrw mtvec, a0
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enable_fpu:
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li x1, MSTATUS_FS_INITIAL
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csrs mstatus, x1
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data_init:
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la a0, _fdata
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la a1, _edata
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