platforms/genesys2: use openocd_genesys2.cfg.
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@ -134,7 +134,7 @@ class Platform(XilinxPlatform):
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XilinxPlatform.__init__(self, "xc7k325t-ffg900-2", _io, _connectors, toolchain="vivado")
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def create_programmer(self):
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return OpenOCD("openocd_xc7_ft2232.cfg", "bscan_spi_xc7a325t.bit")
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return OpenOCD("openocd_genesys2.cfg", "bscan_spi_xc7a325t.bit")
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def do_finalize(self, fragment):
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XilinxPlatform.do_finalize(self, fragment)
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