soc,cpuif: support user defined constants

This commit is contained in:
Sebastien Bourdeauducq 2015-04-09 00:34:36 +08:00
parent 8b41ab3a5f
commit 3a2b677f85
3 changed files with 18 additions and 8 deletions

View File

@ -162,7 +162,7 @@ CPU type: {}
write_to_file(os.path.join(genhdir, "sdram_phy.h"), boilerplate + sdram_phy_header) write_to_file(os.path.join(genhdir, "sdram_phy.h"), boilerplate + sdram_phy_header)
mem_header = cpuif.get_mem_header(memory_regions, getattr(soc, "flash_boot_address", None)) mem_header = cpuif.get_mem_header(memory_regions, getattr(soc, "flash_boot_address", None))
write_to_file(os.path.join(genhdir, "mem.h"), boilerplate + mem_header) write_to_file(os.path.join(genhdir, "mem.h"), boilerplate + mem_header)
csr_header = cpuif.get_csr_header(csr_regions, soc.interrupt_map) csr_header = cpuif.get_csr_header(csr_regions, soc.get_constants())
write_to_file(os.path.join(genhdir, "csr.h"), boilerplate + csr_header) write_to_file(os.path.join(genhdir, "csr.h"), boilerplate + csr_header)
if actions["build-csr-csv"]: if actions["build-csr-csv"]:

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@ -64,6 +64,7 @@ class SoC(Module):
self._memory_regions = [] # list of (name, origin, length) self._memory_regions = [] # list of (name, origin, length)
self._csr_regions = [] # list of (name, origin, busword, csr_list/Memory) self._csr_regions = [] # list of (name, origin, busword, csr_list/Memory)
self._constants = [] # list of (name, value)
self._wb_masters = [] self._wb_masters = []
self._wb_slaves = [] self._wb_slaves = []
@ -159,6 +160,16 @@ class SoC(Module):
def get_csr_regions(self): def get_csr_regions(self):
return self._csr_regions return self._csr_regions
def add_constant(self, name, value):
self._constants.append((name, value))
def get_constants(self):
r = []
for name, interrupt in sorted(self.interrupt_map.items(), key=itemgetter(1)):
r.append((name.upper() + "_INTERRUPT", interrupt))
r += self._constants
return r
def do_finalize(self): def do_finalize(self):
registered_mems = {regions[0] for regions in self._memory_regions} registered_mems = {regions[0] for regions in self._memory_regions}
if self.cpu_type != "none": if self.cpu_type != "none":

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@ -68,7 +68,7 @@ def _get_rw_functions(reg_name, reg_base, nwords, busword, read_only):
r += "}\n" r += "}\n"
return r return r
def get_csr_header(regions, interrupt_map): def get_csr_header(regions, constants):
r = "#ifndef __GENERATED_CSR_H\n#define __GENERATED_CSR_H\n#include <hw/common.h>\n" r = "#ifndef __GENERATED_CSR_H\n#define __GENERATED_CSR_H\n#include <hw/common.h>\n"
for name, origin, busword, obj in regions: for name, origin, busword, obj in regions:
if isinstance(obj, Memory): if isinstance(obj, Memory):
@ -80,12 +80,11 @@ def get_csr_header(regions, interrupt_map):
nr = (csr.size + busword - 1)//busword nr = (csr.size + busword - 1)//busword
r += _get_rw_functions(name + "_" + csr.name, origin, nr, busword, isinstance(csr, CSRStatus)) r += _get_rw_functions(name + "_" + csr.name, origin, nr, busword, isinstance(csr, CSRStatus))
origin += 4*nr origin += 4*nr
try:
interrupt_nr = interrupt_map[name] r += "\n/* constants */\n"
except KeyError: for name, value in constants:
pass r += "#define " + name + " " + str(value) + "\n"
else:
r += "#define "+name.upper()+"_INTERRUPT "+str(interrupt_nr)+"\n"
r += "\n#endif\n" r += "\n#endif\n"
return r return r