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framebuffer: switch to real DMA

This commit is contained in:
Sebastien Bourdeauducq 2012-07-07 00:23:56 +02:00
parent ce82f188d0
commit 3add96212b
1 changed files with 1 additions and 21 deletions
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22
milkymist/framebuffer/__init__.py
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@ -207,25 +207,6 @@ def sim_fifo_gen():
yield t
print("H/V:" + str(t.value["hsync"]) + str(t.value["vsync"]))
class FakeDMA(Actor):
def __init__(self, port):
self.port = port
super().__init__(
("address", Sink, [("a", BV(self.port.hub.aw))]),
("data", Source, [("d", BV(self.port.hub.dw))]))
def get_fragment(self):
pixel = Signal(BV(32))
comb = [
self.endpoints["address"].ack.eq(1),
self.endpoints["data"].stb.eq(1),
self.token("data").d.eq(Replicate(pixel, 4))
]
sync = [
If(self.endpoints["data"].ack, pixel.eq(pixel + 1))
]
return Fragment(comb, sync)
class Framebuffer:
def __init__(self, address, asmiport, simulation=False):
asmi_bits = asmiport.hub.aw
@ -237,8 +218,7 @@ class Framebuffer:
fi = ActorNode(_FrameInitiator(asmi_bits, length_bits, alignment_bits))
adrloop = ActorNode(misc.IntSequence(length_bits, asmi_bits))
adrbuffer = ActorNode(plumbing.Buffer)
#dma = ActorNode(dma_asmi.SequentialReader(asmiport))
dma = ActorNode(FakeDMA(asmiport))
dma = ActorNode(dma_asmi.SequentialReader(asmiport))
cast = ActorNode(structuring.Cast(asmiport.hub.dw, packed_pixels))
unpack = ActorNode(structuring.Unpack(pack_factor, _pixel_layout))
vtg = ActorNode(VTG())