build: Cosmetic cleanups.
This commit is contained in:
parent
c2b62a6b0c
commit
3c1e8e74fc
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@ -17,8 +17,7 @@ from litex.build.generic_platform import *
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from litex.build.generic_toolchain import GenericToolchain
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from litex.build import tools
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# TangDinastyToolchain -----------------------------------------------------------------------------------
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# TangDinastyToolchain -----------------------------------------------------------------------------
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class TangDinastyToolchain(GenericToolchain):
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attr_translate = {}
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@ -10,7 +10,7 @@ from migen.genlib.resetsync import AsyncResetSynchronizer
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from litex.build.io import *
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# Anlogic AsyncResetSynchronizer ---------------------------------------------------------------------
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# Anlogic AsyncResetSynchronizer -------------------------------------------------------------------
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class AnlogicAsyncResetSynchronizerImpl(Module):
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def __init__(self, cd, async_reset):
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@ -45,7 +45,7 @@ class AnlogicAsyncResetSynchronizer:
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def lower(dr):
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return AnlogicAsyncResetSynchronizerImpl(dr.cd, dr.async_reset)
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# Anlogic Special Overrides --------------------------------------------------------------------------
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# Anlogic Special Overrides ------------------------------------------------------------------------
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anlogic_special_overrides = {
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AsyncResetSynchronizer: AnlogicAsyncResetSynchronizer,
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@ -10,7 +10,7 @@ import os
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from litex.build.generic_platform import GenericPlatform
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from litex.build.anlogic import common, anlogic
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# AnlogicPlatform -----------------------------------------------------------------------------------
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# AnlogicPlatform ----------------------------------------------------------------------------------
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class AnlogicPlatform(GenericPlatform):
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bitstream_ext = ".fs"
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@ -57,7 +57,7 @@ class EfinityToolchain(GenericToolchain):
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return GenericToolchain.build(self, platform, fragment, **kwargs)
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# Timing Constraints (.sdc) ------------------------------------------------------------------------
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# Timing Constraints (.sdc) --------------------------------------------------------------------
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def build_timing_constraints(self, vns):
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sdc = []
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@ -87,7 +87,7 @@ class EfinityToolchain(GenericToolchain):
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tools.write_to_file("{}.sdc".format(self._build_name), "\n".join(sdc))
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return (self._build_name + ".sdc", "SDC")
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# Peripheral configuration (.xml) ------------------------------------------------------------------
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# Peripheral configuration (.xml) --------------------------------------------------------------
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def get_pin_direction(self, pinname):
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pins = self.platform.constraint_manager.get_io_signals()
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@ -219,7 +219,7 @@ class EfinityToolchain(GenericToolchain):
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# Project configuration (.xml) ---------------------------------------------------------------------
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# Project configuration (.xml) -----------------------------------------------------------------
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def build_project(self):
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now = datetime.datetime.now()
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@ -5,13 +5,13 @@
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# Copyright (c) 2020 Florent Kermarrec <florent@enjoy-digital.fr>
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# SPDX-License-Identifier: BSD-2-Clause
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import os
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import sys
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import subprocess
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from litex.build import tools
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# Generic Programmer -------------------------------------------------------------------------------
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class GenericProgrammer:
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def __init__(self, flash_proxy_basename=None):
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@ -80,7 +80,7 @@ class GowinDifferentialInput:
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def lower(dr):
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return GowinDifferentialInputImpl(dr.i_p, dr.i_n, dr.o)
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# Gowin Differential Output -------------------------------------------------------------------------
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# Gowin Differential Output ------------------------------------------------------------------------
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class GowinDifferentialOutputImpl(Module):
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def __init__(self, i, o_p, o_n):
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@ -10,7 +10,7 @@ import os
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from litex.build.generic_platform import GenericPlatform
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from litex.build.gowin import common, gowin
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# GowinPlatform -----------------------------------------------------------------------------------
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# GowinPlatform ------------------------------------------------------------------------------------
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class GowinPlatform(GenericPlatform):
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bitstream_ext = ".fs"
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@ -11,7 +11,7 @@ from shutil import which
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from litex.build.generic_programmer import GenericProgrammer
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from litex.build import tools
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# GowinProgrammer --------------------------------------------------------------------------------
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# GowinProgrammer ----------------------------------------------------------------------------------
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GOWIN_PMODE_SRAM = 4
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GOWIN_PMODE_EMBFLASH = 5
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@ -298,7 +298,7 @@ class LatticeNXDDROutput:
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def lower(dr):
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return LatticeNXDDROutputImpl(dr.i1, dr.i2, dr.o, dr.clk)
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# NX DDR Tristate ------------------------------------------------------------------------------------
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# NX DDR Tristate ----------------------------------------------------------------------------------
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class LatticeNXDDRTristateImpl(Module):
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def __init__(self, io, o1, o2, oe1, oe2, i1, i2, clk):
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@ -22,7 +22,7 @@ from litex.build.yosys_nextpnr_toolchain import YosysNextPNRToolchain
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import math
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# LatticeOxideToolchain --------------------------------------------------------------------------
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# LatticeOxideToolchain ----------------------------------------------------------------------------
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class LatticeOxideToolchain(YosysNextPNRToolchain):
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attr_translate = {
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@ -24,7 +24,7 @@ class LatticeProgrammer(GenericProgrammer):
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tools.write_to_file(xcf_file, xcf_content)
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self.call(["pgrcmd", "-infile", xcf_file], check=False)
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# OpenOCDJTAGProgrammer --------------------------------------------------------------------------------
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# OpenOCDJTAGProgrammer ----------------------------------------------------------------------------
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class OpenOCDJTAGProgrammer(GenericProgrammer):
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def __init__(self, config, flash_proxy_basename=None):
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@ -159,7 +159,7 @@ class UJProg(GenericProgrammer):
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def load_bitstream(self, bitstream_file):
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self.call(["ujprog", bitstream_file])
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# EcpDapProgrammer -------------------------------------------------------------------------------
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# EcpDapProgrammer ---------------------------------------------------------------------------------
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class EcpDapProgrammer(GenericProgrammer):
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"""ECPDAP allows you to program ECP5 FPGAs and attached SPI flash using CMSIS-DAP probes in JTAG mode.
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@ -4,19 +4,25 @@
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# Copyright (c) 2022 Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
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# SPDX-License-Identifier: BSD-2-Clause
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#from litex.build import *
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from litex.build import tools
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# NextPNR Wrapper ----------------------------------------------------------------------------------
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class NextPNRWrapper():
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"""
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NextPNRWrapper NexPNR wrapper
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"""
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def __init__(self, family="", architecture="", package="", build_name="",
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in_format="", out_format="", constr_format="",
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pnr_opts="", **kwargs):
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def __init__(self,
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family = "",
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architecture = "",
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package = "",
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build_name = "",
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in_format = "",
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out_format = "",
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constr_format = "",
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pnr_opts = "",
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**kwargs) :
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"""
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Parameters
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==========
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@ -39,15 +45,15 @@ class NextPNRWrapper():
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kwargs: dict
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alternate options key/value
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"""
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self.name = f"nextpnr-{family}"
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self._target = family
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self._build_name = build_name
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self._in_format = in_format
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self._out_format = out_format
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self.name = f"nextpnr-{family}"
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self._target = family
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self._build_name = build_name
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self._in_format = in_format
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self._out_format = out_format
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self._constr_format = constr_format
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self._pnr_opts = pnr_opts + " "
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self._pnr_opts += f"--{architecture} " if architecture != "" else ""
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self._pnr_opts += f"--package {package} " if package != "" else ""
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self._pnr_opts = pnr_opts + " "
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self._pnr_opts += f"--{architecture} " if architecture != "" else ""
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self._pnr_opts += f"--package {package} " if package != "" else ""
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for key,value in kwargs.items():
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key = key.replace("_","-")
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if isinstance(value, bool):
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@ -72,13 +78,14 @@ class NextPNRWrapper():
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" {build_name}.{constr_fmt}" + \
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" --{out_fmt} {build_name}.{out_ext} {pnr_opts}\n"
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base_cmd = cmd.format(
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pnr_name=self.name,
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build_name=self._build_name,
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in_fmt=self._in_format,
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out_fmt="textcfg" if self._out_format == "config" else self._out_format,
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out_ext=self._out_format,
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constr_fmt=self._constr_format,
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pnr_opts=self._pnr_opts)
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pnr_name = self.name,
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build_name = self._build_name,
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in_fmt = self._in_format,
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out_fmt = "textcfg" if self._out_format == "config" else self._out_format,
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out_ext = self._out_format,
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constr_fmt = self._constr_format,
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pnr_opts = self._pnr_opts
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)
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if target == "makefile":
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return f"{self._build_name}.{self._out_format}:\n\t" + base_cmd
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elif target == "script":
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@ -7,7 +7,7 @@
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from litex.build.tools import write_to_file
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from litex.build.generic_programmer import GenericProgrammer
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# openFPGAloader ------------------------------------------------------------------------------------------
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# OpenFPGALoader -----------------------------------------------------------------------------------
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class OpenFPGALoader(GenericProgrammer):
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needs_bitreverse = False
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@ -9,6 +9,7 @@
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from litex.build.tools import write_to_file
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from litex.build.generic_programmer import GenericProgrammer
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# OpenOCD ------------------------------------------------------------------------------------------
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class OpenOCD(GenericProgrammer):
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needs_bitreverse = False
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@ -9,6 +9,6 @@ from migen.genlib.resetsync import AsyncResetSynchronizer
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from litex.build.io import *
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# OS-FPGA Special Overrides --------------------------------------------------------------------------
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# OS-FPGA Special Overrides ------------------------------------------------------------------------
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osfpga_special_overrides = {}
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@ -16,7 +16,7 @@ from litex.build.generic_toolchain import GenericToolchain
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from litex.build.generic_platform import *
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from litex.build import tools
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# OSFPGAToolchain -----------------------------------------------------------------------------------
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# OSFPGAToolchain ----------------------------------------------------------------------------------
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class OSFPGAToolchain(GenericToolchain):
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attr_translate = {}
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@ -18,8 +18,8 @@ from litex.build import tools
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from litex.build.quicklogic import common
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# F4PGAToolchain -------------------------------------------------------------------------------
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# Formerly SymbiflowToolchain, Symbiflow has been renamed to F4PGA -----------------------------
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# F4PGAToolchain -----------------------------------------------------------------------------------
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# Formerly SymbiflowToolchain, Symbiflow has been renamed to F4PGA ---------------------------------
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class F4PGAToolchain(GenericToolchain):
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attr_translate = {}
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@ -445,8 +445,11 @@ def _build_yosys_project(platform, synth_opts="", build_name=""):
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]
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yosys = YosysWrapper(platform, build_name,
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target="xilinx",
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template=[], yosys_cmds=yosys_cmd,
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yosys_opts=f"-family {family}", synth_format="edif")
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target = "xilinx",
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template = [],
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yosys_cmds = yosys_cmd,
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yosys_opts = f"-family {family}",
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synth_format = "edif"
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)
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yosys.build_script()
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return yosys.get_yosys_call("script")
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@ -26,8 +26,8 @@ except ModuleNotFoundError as e:
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F4CACHEPATH = '.f4cache'
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# F4PGAToolchain -------------------------------------------------------------------------------
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# Formerly SymbiflowToolchain, Symbiflow has been renamed to F4PGA -----------------------------
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# F4PGAToolchain -----------------------------------------------------------------------------------
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# Formerly SymbiflowToolchain, Symbiflow has been renamed to F4PGA ---------------------------------
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class F4PGAToolchain(GenericToolchain):
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attr_translate = {
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@ -22,7 +22,7 @@ from litex.build.generic_platform import *
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from litex.build import tools
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from litex.build.xilinx import common
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# XilinxISEToolchain --------------------------------------------------------------------------------
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# XilinxISEToolchain -------------------------------------------------------------------------------
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class XilinxISEToolchain(GenericToolchain):
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attr_translate = {
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@ -37,14 +37,14 @@ class XilinxISEToolchain(GenericToolchain):
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def __init__(self):
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super().__init__()
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self.xst_opt = "-ifmt MIXED\n-use_new_parser yes\n-opt_mode SPEED\n-register_balancing yes"
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self.map_opt = "-ol high -w"
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self.par_opt = "-ol high -w"
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self.xst_opt = "-ifmt MIXED\n-use_new_parser yes\n-opt_mode SPEED\n-register_balancing yes"
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self.map_opt = "-ol high -w"
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self.par_opt = "-ol high -w"
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self.ngdbuild_opt = ""
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self.bitgen_opt = "-g Binary:Yes -w"
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self.ise_commands = ""
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self._mode = "xst"
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self._isemode = "xst"
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self._mode = "xst"
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self._isemode = "xst"
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def build(self, platform, fragment,
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mode = "xst",
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return GenericToolchain.build(self, platform, fragment, **kwargs)
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# Constraints (.ucf) -------------------------------------------------------------------------------
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# Constraints (.ucf) ---------------------------------------------------------------------------
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@classmethod
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def _format_constraint(cls, c):
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tools.write_to_file(self._build_name + ".xst", xst_contents)
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# ISE Run ------------------------------------------------------------------------------------------
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# ISE Run --------------------------------------------------------------------------------------
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def build_script(self):
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if sys.platform == "win32" or sys.platform == "cygwin":
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@ -176,7 +176,6 @@ bitgen {bitgen_opt} {build_name}.ncd {build_name}.bit{fail_stmt}
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return build_script_file
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def run_script(self, script):
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if self._mode == "edif":
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# Generate edif
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e_output = self.platform.get_edif(self._fragment)
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@ -206,7 +206,7 @@ class Adept(GenericProgrammer):
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"prog", "-d", self.board,
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"-i", str(self.index),
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"-f", bitstream_file,
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])
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])
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def flash(self, address, data_file):
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raise ValueError("Flashing unsupported with DigilentAdept tools")
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@ -28,18 +28,10 @@ def _unwrap(value):
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return value.value if isinstance(value, Constant) else value
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# YosysNextpnrToolchain -------------------------------------------------------------------------------
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# YosysNextpnrToolchain ----------------------------------------------------------------------------
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class XilinxYosysNextpnrToolchain(YosysNextPNRToolchain):
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attr_translate = {
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#"keep": ("dont_touch", "true"),
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#"no_retiming": ("dont_touch", "true"),
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#"async_reg": ("async_reg", "true"),
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#"mr_ff": ("mr_ff", "true"), # user-defined attribute
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#"ars_ff1": ("ars_ff1", "true"), # user-defined attribute
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#"ars_ff2": ("ars_ff2", "true"), # user-defined attribute
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#"no_shreg_extract": None
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}
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attr_translate = {}
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family = "xilinx"
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synth_fmt = "json"
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@ -1,12 +1,11 @@
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#
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# This file is part of LiteX.
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#
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# Copyright (c) 2022 Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
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# Copyright (c) 2017-2018 William D. Jones <thor0505@comcast.net>
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# Copyright (c) 2019 Florent Kermarrec <florent@enjoy-digital.fr>
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# Copyright (c) 2022 Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
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# SPDX-License-Identifier: BSD-2-Clause
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import sys
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import subprocess
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from shutil import which
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@ -16,7 +15,7 @@ from litex.build.generic_toolchain import GenericToolchain
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from litex.build.nextpnr_wrapper import NextPNRWrapper
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from litex.build.yosys_wrapper import YosysWrapper
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# YosysNextPNRToolchain -------------------------------------------------------------------------
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# YosysNextPNRToolchain ----------------------------------------------------------------------------
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class YosysNextPNRToolchain(GenericToolchain):
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"""
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@ -166,13 +165,13 @@ class YosysNextPNRToolchain(GenericToolchain):
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"""
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if sys.platform in ("win32", "cygwin"):
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script_ext = ".bat"
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script_ext = ".bat"
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script_contents = "@echo off\nrem Autogenerated by LiteX / git: " + tools.get_litex_git_revision() + "\n\n"
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fail_stmt = " || exit /b"
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fail_stmt = " || exit /b"
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else:
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script_ext = ".sh"
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script_ext = ".sh"
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script_contents = "# Autogenerated by LiteX / git: " + tools.get_litex_git_revision() + "\nset -e\n"
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fail_stmt = ""
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fail_stmt = ""
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# yosys call
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script_contents += self._yosys.get_yosys_call("script") + fail_stmt
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@ -4,20 +4,23 @@
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# Copyright (c) 2022 Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
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# SPDX-License-Identifier: BSD-2-Clause
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from litex.build import tools
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# YosysWrapper -------------------------------------------------------------------------------------
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class YosysWrapper():
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"""
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YosysWrapper synthesis wrapper
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"""
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def __init__(self, platform, build_name, target="", output_name="",
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template=[], yosys_opts="",
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yosys_cmds=[],
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synth_format="json",
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**kwargs):
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def __init__(self, platform, build_name,
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target = "",
|
||||
output_name = "",
|
||||
template = [],
|
||||
yosys_opts = "",
|
||||
yosys_cmds = [],
|
||||
synth_format = "json",
|
||||
**kwargs) :
|
||||
"""
|
||||
Parameters
|
||||
==========
|
||||
|
@ -41,21 +44,21 @@ class YosysWrapper():
|
|||
list of key/value for yosys_opts [optional]
|
||||
"""
|
||||
|
||||
assert platform != ""
|
||||
assert build_name != ""
|
||||
assert target != ""
|
||||
assert platform != ""
|
||||
assert build_name != ""
|
||||
assert target != ""
|
||||
assert synth_format != ""
|
||||
|
||||
self._template = self._default_template if template == [] else template
|
||||
self._template = self._default_template if template == [] else template
|
||||
self._output_name = build_name if output_name == "" else output_name
|
||||
|
||||
self._platform = platform
|
||||
self._build_name = build_name
|
||||
self._platform = platform
|
||||
self._build_name = build_name
|
||||
self._synth_format = synth_format
|
||||
self._yosys_opts = yosys_opts
|
||||
self._yosys_cmds = yosys_cmds
|
||||
self._yosys_opts = yosys_opts
|
||||
self._yosys_cmds = yosys_cmds
|
||||
|
||||
self._target=target
|
||||
self._target = target
|
||||
|
||||
for key,value in kwargs.items():
|
||||
key = key.replace("_","-")
|
||||
|
|
Loading…
Reference in New Issue