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cpu/vexriscv: bump submodule

This commit is contained in:
Mateusz Holenko 2019-07-23 11:48:00 +02:00
parent e673fce445
commit 3e89c56468
1 changed files with 1 additions and 1 deletions
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2
litex/soc/cores/cpu/vexriscv/verilog

@ -1 +1 @@
Subproject commit 03f7f9d46c9c862e1ef3ebbe19b5113b882e4358
Subproject commit 747a2e012f43d13c3487acc3c758477aad277559