targets/kcu105: remove main_ram_size_limit
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@ -96,8 +96,7 @@ class BaseSoC(SoCSDRAM):
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sdram_module = EDY4016A(sys_clk_freq, "1:4")
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self.register_sdram(self.ddrphy,
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geom_settings = sdram_module.geom_settings,
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timing_settings = sdram_module.timing_settings,
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main_ram_size_limit = 0x40000000)
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timing_settings = sdram_module.timing_settings)
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# EthernetSoC --------------------------------------------------------------------------------------
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