bus/wishbone/sram: accept memories < 32 bits
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@ -197,7 +197,7 @@ class Target(PureSimulable):
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class SRAM:
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def __init__(self, mem_or_size, bus=Interface()):
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if isinstance(mem_or_size, Memory):
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assert(mem_or_size.width == 32)
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assert(mem_or_size.width <= 32)
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self.mem = mem_or_size
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else:
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self.mem = Memory(32, mem_or_size//4)
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