mirror of
https://github.com/enjoy-digital/litex.git
synced 2025-01-04 09:52:26 -05:00
fifo: add support for depth=2
This commit is contained in:
parent
70a2ee4368
commit
4c426b36f3
1 changed files with 10 additions and 6 deletions
|
@ -217,12 +217,16 @@ class AsyncFIFO(Module, _FIFOInterface):
|
|||
NoRetiming(consume.q),
|
||||
MultiReg(consume.q, consume_wdomain, "write")
|
||||
]
|
||||
if depth_bits == 1:
|
||||
self.comb += self.writable.eq((produce.q[-1] == consume_wdomain[-1])
|
||||
| (produce.q[-2] == consume_wdomain[-2]))
|
||||
else:
|
||||
self.comb += [
|
||||
self.writable.eq((produce.q[-1] == consume_wdomain[-1])
|
||||
| (produce.q[-2] == consume_wdomain[-2])
|
||||
| (produce.q[:-2] != consume_wdomain[:-2])),
|
||||
self.readable.eq(consume.q != produce_rdomain)
|
||||
| (produce.q[:-2] != consume_wdomain[:-2]))
|
||||
]
|
||||
self.comb += self.readable.eq(consume.q != produce_rdomain)
|
||||
|
||||
storage = Memory(self.width, depth)
|
||||
self.specials += storage
|
||||
|
|
Loading…
Reference in a new issue