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gensoc: call do_exit after SoC is built

This commit is contained in:
Florent Kermarrec 2015-02-15 19:20:48 +01:00 committed by Sebastien Bourdeauducq
parent da13bd536e
commit 4c9554b65c
2 changed files with 5 additions and 1 deletions
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3
make.py
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@ -182,7 +182,8 @@ CPU type: {}
for decorator in args.decorate: for decorator in args.decorate:
soc = getattr(simplify, decorator)(soc) soc = getattr(simplify, decorator)(soc)
build_kwargs = dict((k, autotype(v)) for k, v in args.build_option) build_kwargs = dict((k, autotype(v)) for k, v in args.build_option)
platform.build(soc, build_name=build_name, **build_kwargs) vns = platform.build(soc, build_name=build_name, **build_kwargs)
soc.do_exit(vns)
if actions["load-bitstream"] or actions["flash-bitstream"] or actions["flash-bios"]: if actions["load-bitstream"] or actions["flash-bitstream"] or actions["flash-bios"]:
prog = platform.create_programmer() prog = platform.create_programmer()

3
misoclib/gensoc/__init__.py
View File

@ -138,6 +138,9 @@ class GenSoC(Module):
t += clk_period_ns/2 t += clk_period_ns/2
return ceil(t/clk_period_ns) return ceil(t/clk_period_ns)
def do_exit(self, vns):
pass
class IntegratedBIOS: class IntegratedBIOS:
def __init__(self, bios_size=0x8000): def __init__(self, bios_size=0x8000):
self.submodules.rom = wishbone.SRAM(bios_size, read_only=True) self.submodules.rom = wishbone.SRAM(bios_size, read_only=True)