build/generic_toolchain: Add add_false_path_constraint and remove it from altera/quartus, lattice/trellis.

litex/build/altera/quartus.py

@@ -213,9 +213,3 @@ fi
 
         if subprocess.call(shell + [script]) != 0:
             raise OSError("Error occured during Quartus's script execution.")
-
-    def add_false_path_constraint(self, platform, from_, to):
-        from_.attr.add("keep")
-        to.attr.add("keep")
-        if (to, from_) not in self.false_paths:
-            self.false_paths.add((from_, to))

litex/build/generic_toolchain.py

@@ -6,6 +6,7 @@
 # SPDX-License-Identifier: BSD-2-Clause
 
 import os
+import math
 
 from migen.fhdl.structure import _Fragment
 
@@ -95,4 +96,10 @@ class GenericToolchain:
             if period != self.clocks[clk]:
                 raise ValueError("Clock already constrained to {:.2f}ns, new constraint to {:.2f}ns"
                     .format(self.clocks[clk], period))
-        self.clocks[clk] = period
+        self.clocks[clk] = period
+
+    def add_false_path_constraint(self, platform, from_, to):
+        from_.attr.add("keep")
+        to.attr.add("keep")
+        if (to, from_) not in self.false_paths:
+            self.false_paths.add((from_, to))

litex/build/lattice/trellis.py

@@ -220,12 +220,6 @@ class LatticeTrellisToolchain(GenericToolchain):
         platform.add_platform_command("""FREQUENCY PORT "{clk}" {freq} MHz;""".format(
             freq=str(float(1/period)*1000), clk="{clk}"), clk=clk)
 
-    def add_false_path_constraint(self, platform, from_, to):
-        from_.attr.add("keep")
-        to.attr.add("keep")
-        if (to, from_) not in self.false_paths:
-            self.false_paths.add((from_, to))
-
 def trellis_args(parser):
     toolchain_group = parser.add_argument_group(title="Toolchain options")
     toolchain_group.add_argument("--yosys-nowidelut",      action="store_true", help="Use Yosys's nowidelut mode.")