Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #423 from gsomlo/gls-ethmac-fixes 

integration/soc: add_ethernet: honor self.map["ethmac"], if present
This commit is contained in:
enjoy-digital 2020-03-11 12:33:50 +01:00 committed by GitHub
parent bb8905fa5d a904034811
commit 4ccf62afc1
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 2 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
litex/soc/integration/soc.py
View File

@ -1044,7 +1044,8 @@ class LiteXSoC(SoC):
dw = 32, dw = 32,
interface = "wishbone", interface = "wishbone",
endianness = self.cpu.endianness) endianness = self.cpu.endianness)
ethmac_region = SoCRegion(size=0x2000, cached=False) ethmac_region = SoCRegion(origin=self.mem_map.get("ethmac", None),
size=0x2000, cached=False)
self.bus.add_slave(name="ethmac", slave=self.ethmac.bus, region=ethmac_region) self.bus.add_slave(name="ethmac", slave=self.ethmac.bus, region=ethmac_region)
self.add_csr("ethmac") self.add_csr("ethmac")
self.add_interrupt("ethmac") self.add_interrupt("ethmac")