software/bios: display SDRAM databits and freq.

This commit is contained in:
Florent Kermarrec 2020-08-07 19:49:02 +02:00
parent 6f69679d21
commit 4cf28a0107
3 changed files with 25 additions and 7 deletions

View file

@ -100,22 +100,29 @@ int main(int i, char **c)
printf(" LiteX git sha1: "LITEX_GIT_SHA1"\n"); printf(" LiteX git sha1: "LITEX_GIT_SHA1"\n");
printf("\n"); printf("\n");
printf("--=============== \e[1mSoC\e[0m ==================--\n"); printf("--=============== \e[1mSoC\e[0m ==================--\n");
printf("\e[1mCPU\e[0m: %s @ %dMHz\n", printf("\e[1mCPU\e[0m:\t\t%s @ %dMHz\n",
CONFIG_CPU_HUMAN_NAME, CONFIG_CPU_HUMAN_NAME,
CONFIG_CLOCK_FREQUENCY/1000000); CONFIG_CLOCK_FREQUENCY/1000000);
printf("\e[1mBUS\e[0m: %s %d-bit @ %dGiB\n", printf("\e[1mBUS\e[0m:\t\t%s %d-bit @ %dGiB\n",
CONFIG_BUS_STANDARD, CONFIG_BUS_STANDARD,
CONFIG_BUS_DATA_WIDTH, CONFIG_BUS_DATA_WIDTH,
(1 << (CONFIG_BUS_ADDRESS_WIDTH - 30))); (1 << (CONFIG_BUS_ADDRESS_WIDTH - 30)));
printf("\e[1mCSR\e[0m: %d-bit data\n", printf("\e[1mCSR\e[0m:\t\t%d-bit data\n",
CONFIG_CSR_DATA_WIDTH); CONFIG_CSR_DATA_WIDTH);
printf("\e[1mROM\e[0m: %dKiB\n", ROM_SIZE/1024); printf("\e[1mROM\e[0m:\t\t%dKiB\n", ROM_SIZE/1024);
printf("\e[1mSRAM\e[0m: %dKiB\n", SRAM_SIZE/1024); printf("\e[1mSRAM\e[0m:\t\t%dKiB\n", SRAM_SIZE/1024);
#ifdef CONFIG_L2_SIZE #ifdef CONFIG_L2_SIZE
printf("\e[1mL2\e[0m: %dKiB\n", CONFIG_L2_SIZE/1024); printf("\e[1mL2\e[0m:\t\t%dKiB\n", CONFIG_L2_SIZE/1024);
#endif #endif
#ifdef MAIN_RAM_SIZE #ifdef MAIN_RAM_SIZE
printf("\e[1mMAIN-RAM\e[0m: %dKiB\n", MAIN_RAM_SIZE/1024); #ifdef CSR_SDRAM_BASE
printf("\e[1mSDRAM\e[0m:\t\t%dKiB %d-bit @ %dMHz\n",
MAIN_RAM_SIZE/1024,
sdrdatabits(),
sdrfreq()/1000000);
#else
printf("\e[1mMAIN-RAM\e[0m:\t%dKiB \n", MAIN_RAM_SIZE/1024);
#endif
#endif #endif
printf("\n"); printf("\n");

View file

@ -42,6 +42,14 @@ __attribute__((unused)) static void cdelay(int i)
#define DFII_PIX_DATA_BYTES DFII_PIX_DATA_SIZE*CSR_DATA_BYTES #define DFII_PIX_DATA_BYTES DFII_PIX_DATA_SIZE*CSR_DATA_BYTES
int sdrdatabits(void) {
return SDRAM_PHY_DATABITS;
}
int sdrfreq(void) {
return SDRAM_PHY_XDR*SDRAM_PHY_PHASES*CONFIG_CLOCK_FREQUENCY;
}
void sdrsw(void) void sdrsw(void)
{ {
sdram_dfii_control_write(DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N); sdram_dfii_control_write(DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N);

View file

@ -3,6 +3,9 @@
#include <generated/csr.h> #include <generated/csr.h>
int sdrdatabits(void);
int sdrfreq(void);
void sdrsw(void); void sdrsw(void);
void sdrhw(void); void sdrhw(void);
void sdrrow(unsigned int row); void sdrrow(unsigned int row);