boards/targets/versaecp55g: use new iowrapper support, basic led blink and ios working :)
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@ -11,44 +11,16 @@ class BaseSoC(Module):
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def __init__(self, platform):
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self.clock_domains.cd_sys = ClockDomain()
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sys_clk_pads = platform.request("clk100")
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btn_pads = platform.request("user_dip_btn")
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led0_pads = platform.request("user_led", 0)
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led1_pads = platform.request("user_led", 1)
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# FIXME: no constraint file for now with prjtrellis
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platform.lookup_request("clk100").attr.add(("LOC", "P3"))
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platform.lookup_request("clk100").attr.add(("IO_TYPE", "LVDS"))
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platform.lookup_request("user_dip_btn").attr.add(("LOC", "H2"))
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platform.lookup_request("user_dip_btn").attr.add(("IO_TYPE", "LVCMOS15"))
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platform.lookup_request("user_led", 0).attr.add(("LOC", "E16"))
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platform.lookup_request("user_led", 0).attr.add(("IO_TYPE", "LVCMOS25"))
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platform.lookup_request("user_led", 1).attr.add(("LOC", "D17"))
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platform.lookup_request("user_led", 1).attr.add(("IO_TYPE", "LVCMOS25"))
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# FIXME: add TRELLIS_IO instance on all inputs/outputs
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sys_clk_pads_i = Signal()
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btn_pads_i = Signal()
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led0_pads_i = Signal()
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led1_pads_i = Signal()
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self.specials += [
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Instance("TRELLIS_IO", p_DIR="INPUT", io_B=sys_clk_pads, o_O=sys_clk_pads_i),
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Instance("TRELLIS_IO", p_DIR="INPUT", io_B=btn_pads, o_O=btn_pads_i),
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Instance("TRELLIS_IO", p_DIR="OUTPUT", io_B=led0_pads, i_I=led0_pads_i),
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Instance("TRELLIS_IO", p_DIR="OUTPUT", io_B=led1_pads, i_I=led1_pads_i),
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]
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# crg
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self.comb += self.cd_sys.clk.eq(sys_clk_pads_i)
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self.comb += self.cd_sys.clk.eq(platform.request("clk100"))
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# led0 (blink)
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counter = Signal(32)
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self.sync += counter.eq(counter + 1)
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self.comb += led0_pads_i.eq(counter[26])
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self.comb += platform.request("user_led", 0).eq(counter[26])
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# led1 (btn)
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self.comb += led1_pads_i.eq(btn_pads_i)
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self.comb += platform.request("user_led", 1).eq(platform.request("user_dip_btn", 0))
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def main():
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platform = versaecp55g.Platform(toolchain="prjtrellis")
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