soc/integration/builder: move csr_csv generation outside of generate include
we mostly use csr_csv for designs without CPU
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@ -92,7 +92,11 @@ class Builder:
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with open(os.path.join(generated_dir, "sdram_phy.h"), "w") as f:
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f.write(sdram_init.get_sdram_phy_header(sdram_phy_settings))
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if self.csr_csv is not None:
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def _generate_csr_csv(self):
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memory_regions = self.soc.get_memory_regions()
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csr_regions = self.soc.get_csr_regions()
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constants = self.soc.get_constants()
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with open(self.csr_csv, "w") as f:
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f.write(cpu_interface.get_csr_csv(csr_regions, constants, memory_regions))
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@ -145,6 +149,9 @@ class Builder:
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self._generate_software()
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self._initialize_rom()
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if self.csr_csv is not None:
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self._generate_csr_csv()
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if self.gateware_toolchain_path is not None:
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toolchain_path = self.gateware_toolchain_path
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self.soc.build(build_dir=os.path.join(self.output_dir, "gateware"),
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