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liblitespi/spiflash: Use software defined constants and fix spiflash_master_write (mmap renamed to core).

This commit is contained in:
Florent Kermarrec 2021-07-29 19:25:28 +02:00
parent ab48461d6a
commit 518a3e1f65
1 changed files with 20 additions and 12 deletions
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32
litex/soc/software/liblitespi/spiflash.c
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@ -41,7 +41,7 @@ int spiflash_freq_init(void)
#endif #endif
} }
lowest_div++; lowest_div++;
printf("SPI Flash freq configured to %d MHz\n", (spiflash_core_sys_clk_freq_read()/(2*(1 + lowest_div)))/1000000); printf("SPI Flash clk configured to %d MHz\n", (spiflash_core_sys_clk_freq_read()/(2*(1 + lowest_div)))/1000000);
spiflash_phy_clk_divisor_write(lowest_div); spiflash_phy_clk_divisor_write(lowest_div);
@ -56,33 +56,37 @@ void spiflash_dummy_bits_setup(unsigned int dummy_bits)
#endif #endif
} }
#ifdef CSR_SPIFLASH_CORE_MASTER_CS_ADDR
static void spiflash_master_write(uint32_t val, size_t len, size_t width, uint32_t mask) static void spiflash_master_write(uint32_t val, size_t len, size_t width, uint32_t mask)
{ {
/* Be sure to empty RX queue before doing Xfer. */ /* Be sure to empty RX queue before doing Xfer. */
while (spiflash_mmap_master_status_rx_ready_read()) while (spiflash_core_master_status_rx_ready_read())
spiflash_mmap_master_rxtx_read(); spiflash_core_master_rxtx_read();
/* Configure Master */ /* Configure Master */
spiflash_mmap_master_phyconfig_len_write(8 * len); spiflash_core_master_phyconfig_len_write(8 * len);
spiflash_mmap_master_phyconfig_mask_write(mask); spiflash_core_master_phyconfig_mask_write(mask);
spiflash_mmap_master_phyconfig_width_write(width); spiflash_core_master_phyconfig_width_write(width);
/* Set CS. */ /* Set CS. */
spiflash_mmap_master_cs_write(1); spiflash_core_master_cs_write(1);
/* Do Xfer. */ /* Do Xfer. */
spiflash_mmap_master_rxtx_write(val); spiflash_core_master_rxtx_write(val);
while (!spiflash_mmap_master_status_rx_ready_read()); while (!spiflash_core_master_status_rx_ready_read());
/* Clear CS. */ /* Clear CS. */
spiflash_mmap_master_cs_write(0); spiflash_core_master_cs_write(0);
} }
#endif
void spiflash_init(void) void spiflash_init(void)
{ {
int ret; int ret;
printf("Initializing SPI Flash...\n"); printf("Initializing %s SPI Flash...\n", SPIFLASH_MODULE_NAME);
/* Clk frequency auto-calibration. */ /* Clk frequency auto-calibration. */
ret = spiflash_freq_init(); ret = spiflash_freq_init();
@ -94,7 +98,9 @@ void spiflash_init(void)
spiflash_dummy_bits_setup(SPIFLASH_MODULE_DUMMY_BITS); spiflash_dummy_bits_setup(SPIFLASH_MODULE_DUMMY_BITS);
#endif #endif
/* Quad / QPI Configuraiton. */ #ifdef CSR_SPIFLASH_CORE_MASTER_CS_ADDR
/* Quad / QPI Configuration. */
#ifdef SPIFLASH_MODULE_QUAD_CAPABLE #ifdef SPIFLASH_MODULE_QUAD_CAPABLE
printf("Enabling Quad mode...\n"); printf("Enabling Quad mode...\n");
spiflash_master_write(0x00000006, 1, 1, 0x1); spiflash_master_write(0x00000006, 1, 1, 0x1);
@ -107,6 +113,8 @@ void spiflash_init(void)
#endif #endif
#endif
} }
#endif #endif