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litescope: pep8 (E231)

This commit is contained in:
Florent Kermarrec 2015-04-13 13:23:48 +02:00
parent 67b4da8ecf
commit 51ca259bdb
6 changed files with 10 additions and 10 deletions
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2
misoclib/tools/litescope/host/driver/uart.py
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@ -4,7 +4,7 @@ from misoclib.tools.litescope.host.driver.reg import *
def write_b(uart, data): def write_b(uart, data):
uart.write(pack('B',data)) uart.write(pack('B', data))
class LiteScopeUARTDriver: class LiteScopeUARTDriver:

2
misoclib/tools/litescope/host/dump/__init__.py
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@ -109,5 +109,5 @@ class Dump:
def __len__(self): def __len__(self):
l = 0 l = 0
for var in self.vars: for var in self.vars:
l = max(len(var),l) l = max(len(var), l)
return l return l

4
misoclib/tools/litescope/host/dump/csv.py
View File

@ -46,8 +46,8 @@ class CSVDump(Dump):
if __name__ == '__main__': if __name__ == '__main__':
dump = CSVDump() dump = CSVDump()
dump.add(Var("foo1", 1, [0,1,0,1,0,1])) dump.add(Var("foo1", 1, [0, 1, 0, 1, 0, 1]))
dump.add(Var("foo2", 2, [1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0])) dump.add(Var("foo2", 2, [1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0]))
ramp = [i%128 for i in range(1024)] ramp = [i%128 for i in range(1024)]
dump.add(Var("ramp", 16, ramp)) dump.add(Var("ramp", 16, ramp))
dump.write("dump.csv") dump.write("dump.csv")

4
misoclib/tools/litescope/host/dump/python.py
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@ -27,8 +27,8 @@ class PythonDump(Dump):
if __name__ == '__main__': if __name__ == '__main__':
dump = PythonDump() dump = PythonDump()
dump.add(Var("foo1", 1, [0,1,0,1,0,1])) dump.add(Var("foo1", 1, [0, 1, 0, 1, 0, 1]))
dump.add(Var("foo2", 2, [1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0])) dump.add(Var("foo2", 2, [1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0]))
ramp = [i%128 for i in range(1024)] ramp = [i%128 for i in range(1024)]
dump.add(Var("ramp", 16, ramp)) dump.add(Var("ramp", 16, ramp))
dump.write("dump.py") dump.write("dump.py")

4
misoclib/tools/litescope/host/dump/sigrok.py
View File

@ -141,8 +141,8 @@ samplerate = {} KHz
if __name__ == '__main__': if __name__ == '__main__':
dump = SigrokDump() dump = SigrokDump()
dump.add(Var("foo1", 1, [0,1,0,1,0,1])) dump.add(Var("foo1", 1, [0, 1, 0, 1, 0, 1]))
dump.add(Var("foo2", 2, [1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0])) dump.add(Var("foo2", 2, [1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0]))
ramp = [i%128 for i in range(1024)] ramp = [i%128 for i in range(1024)]
dump.add(Var("ramp", 16, ramp)) dump.add(Var("ramp", 16, ramp))
dump.write("dump.sr") dump.write("dump.sr")

4
misoclib/tools/litescope/host/dump/vcd.py
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@ -121,8 +121,8 @@ class VCDDump(Dump):
if __name__ == '__main__': if __name__ == '__main__':
dump = VCDDump() dump = VCDDump()
dump.add(Var("foo1", 1, [0,1,0,1,0,1])) dump.add(Var("foo1", 1, [0, 1, 0, 1, 0, 1]))
dump.add(Var("foo2", 2, [1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0])) dump.add(Var("foo2", 2, [1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0]))
ramp = [i%128 for i in range(1024)] ramp = [i%128 for i in range(1024)]
dump.add(Var("ramp", 16, ramp)) dump.add(Var("ramp", 16, ramp))
dump.write("dump.vcd") dump.write("dump.vcd")