soc/integration: support software_debug for add_spi_flash()
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@ -1758,7 +1758,7 @@ class LiteXSoC(SoC):
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self.platform.add_false_path_constraints(self.crg.cd_sys.clk, eth_rx_clk, eth_tx_clk)
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# Add SPI Flash --------------------------------------------------------------------------------
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def add_spi_flash(self, name="spiflash", mode="4x", clk_freq=None, module=None, phy=None, rate="1:1", **kwargs):
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def add_spi_flash(self, name="spiflash", mode="4x", clk_freq=None, module=None, phy=None, rate="1:1", software_debug=False, **kwargs):
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# Imports.
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from litespi import LiteSPI
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from litespi.phy.generic import LiteSPIPHY
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@ -1792,6 +1792,8 @@ class LiteXSoC(SoC):
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self.add_constant(f"{name}_MODULE_QUAD_CAPABLE")
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if SpiNorFlashOpCodes.READ_4_4_4 in module.supported_opcodes:
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self.add_constant(f"{name}_MODULE_QPI_CAPABLE")
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if software_debug:
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self.add_constant(f"{name}_DEBUG")
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# Add SPI SDCard -------------------------------------------------------------------------------
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def add_spi_sdcard(self, name="spisdcard", spi_clk_freq=400e3, with_tristate=False, software_debug=False):
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@ -28,7 +28,7 @@ int spiflash_freq_init(void)
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crc = crc32((unsigned char *)SPIFLASH_BASE, SPI_FLASH_BLOCK_SIZE);
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crc_test = crc;
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#if SPIFLASH_DEBUG
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#ifdef SPIFLASH_DEBUG
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printf("Testing against CRC32: %08x\n\r", crc);
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#endif
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@ -41,7 +41,7 @@ int spiflash_freq_init(void)
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while((crc == crc_test) && (lowest_div-- > 0)) {
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spiflash_phy_clk_divisor_write((uint32_t)lowest_div);
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crc_test = crc32((unsigned char *)SPIFLASH_BASE, SPI_FLASH_BLOCK_SIZE);
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#if SPIFLASH_DEBUG
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#ifdef SPIFLASH_DEBUG
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printf("[DIV: %d] %08x\n\r", lowest_div, crc_test);
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#endif
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}
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@ -62,7 +62,7 @@ int spiflash_freq_init(void)
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void spiflash_dummy_bits_setup(unsigned int dummy_bits)
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{
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spiflash_core_mmap_dummy_bits_write((uint32_t)dummy_bits);
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#if SPIFLASH_DEBUG
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#ifdef SPIFLASH_DEBUG
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printf("Dummy bits set to: %d\n\r", spiflash_core_mmap_dummy_bits_read());
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#endif
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}
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