[enh] ECP5 DIfferential input support
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@ -5,6 +5,7 @@
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# Copyright (c) 2017 William D. Jones <thor0505@comcast.net>
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# Copyright (c) 2017 William D. Jones <thor0505@comcast.net>
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# Copyright (c) 2019 David Shah <dave@ds0.me>
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# Copyright (c) 2019 David Shah <dave@ds0.me>
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# Copyright (c) 2020 David Corrigan <davidcorrigan714@gmail.com>
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# Copyright (c) 2020 David Corrigan <davidcorrigan714@gmail.com>
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# Copyright (c) 2021 Charles-Henri Mousset <ch.mousset@gmail.com>
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# SPDX-License-Identifier: BSD-2-Clause
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# SPDX-License-Identifier: BSD-2-Clause
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from migen.fhdl.module import Module
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from migen.fhdl.module import Module
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@ -105,6 +106,21 @@ class LatticeECP5DDROutput:
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def lower(dr):
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def lower(dr):
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return LatticeECP5DDROutputImpl(dr.i1, dr.i2, dr.o, dr.clk)
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return LatticeECP5DDROutputImpl(dr.i1, dr.i2, dr.o, dr.clk)
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# ECP5 Differential Input --------------------------------------------------------------------------
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class LatticeECP5DifferentialInputImpl(Module):
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def __init__(self, i_p, i_n, o):
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self.specials += Instance("ILVDS",
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i_A=i_p,
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i_AN=i_n,
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o_Z=o,
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)
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class LatticeECP5DifferentialInput:
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@staticmethod
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def lower(dr):
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return LatticeECP5DifferentialInputImpl(dr.i_p, dr.i_n, dr.o)
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# ECP5 Special Overrides ---------------------------------------------------------------------------
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# ECP5 Special Overrides ---------------------------------------------------------------------------
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lattice_ecp5_special_overrides = {
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lattice_ecp5_special_overrides = {
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@ -113,6 +129,7 @@ lattice_ecp5_special_overrides = {
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SDROutput: LatticeECP5SDROutput,
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SDROutput: LatticeECP5SDROutput,
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DDRInput: LatticeECP5DDRInput,
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DDRInput: LatticeECP5DDRInput,
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DDROutput: LatticeECP5DDROutput,
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DDROutput: LatticeECP5DDROutput,
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DifferentialInput: LatticeECP5DifferentialInput,
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}
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}
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# ECP5 Trellis Tristate ----------------------------------------------------------------------------
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# ECP5 Trellis Tristate ----------------------------------------------------------------------------
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@ -142,7 +159,8 @@ lattice_ecp5_trellis_special_overrides = {
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SDRInput: LatticeECP5SDRInput,
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SDRInput: LatticeECP5SDRInput,
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SDROutput: LatticeECP5SDROutput,
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SDROutput: LatticeECP5SDROutput,
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DDRInput: LatticeECP5DDRInput,
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DDRInput: LatticeECP5DDRInput,
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DDROutput: LatticeECP5DDROutput
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DDROutput: LatticeECP5DDROutput,
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DifferentialInput: LatticeECP5DifferentialInput,
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}
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}
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