pipistrello: add por reset counter
* this is a temporary fix that should be removed once the combination of bitstream-in-flash, mor1kx, bios-in-flash works
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340014dbac
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54c14c7119
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@ -58,7 +58,12 @@ class _CRG(Module):
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)
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self.specials += Instance("BUFG", i_I=pll[5], o_O=self.cd_sys.clk)
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reset = platform.request("user_btn")
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self.specials += AsyncResetSynchronizer(self.cd_sys, ~pll_lckd | reset)
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self.clock_domains.cd_por = ClockDomain()
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por = Signal(max=1 << 11, reset=(1 << 11) - 1)
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self.sync.por += If(por != 0, por.eq(por - 1))
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self.comb += self.cd_por.clk.eq(self.cd_sys.clk)
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self.specials += AsyncResetSynchronizer(self.cd_por, reset)
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self.specials += AsyncResetSynchronizer(self.cd_sys, ~pll_lckd | (por > 0))
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self.specials += Instance("BUFG", i_I=pll[2], o_O=self.cd_sdram_half.clk)
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self.specials += Instance("BUFPLL", p_DIVIDE=4,
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i_PLLIN=pll[0], i_GCLK=self.cd_sys.clk,
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