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Lattice: Fix port names in SDR{in/out} Impl 

Signed-off-by: Karol Gugala <kgugala@antmicro.com>
This commit is contained in:
Karol Gugala 2021-04-25 19:47:30 +02:00
parent 22d763ee11
commit 54f729fbc1
1 changed files with 2 additions and 2 deletions
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4
litex/build/lattice/common.py
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@ -196,7 +196,7 @@ class LatticeNXAsyncResetSynchronizer:
class LatticeNXSDRInputImpl(Module):
def __init__(self, i, o, clk):
self.specials += Instance("IFD1P3BX",
i_SCLK = clk,
i_CK = clk,
i_PD = 0,
i_SP = 1,
i_D = i,
@ -213,7 +213,7 @@ class LatticeNXSDRInput:
class LatticeNXSDROutputImpl(Module):
def __init__(self, i, o, clk):
self.specials += Instance("OFD1P3BX",
i_SCLK = clk,
i_CK = clk,
i_PD = 0,
i_SP = 1,
i_D = i,