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Lattice: Fix port names in SDR{in/out} Impl
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
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parent
22d763ee11
commit
54f729fbc1
1 changed files with 2 additions and 2 deletions
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@ -196,7 +196,7 @@ class LatticeNXAsyncResetSynchronizer:
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class LatticeNXSDRInputImpl(Module):
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class LatticeNXSDRInputImpl(Module):
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def __init__(self, i, o, clk):
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def __init__(self, i, o, clk):
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self.specials += Instance("IFD1P3BX",
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self.specials += Instance("IFD1P3BX",
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i_SCLK = clk,
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i_CK = clk,
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i_PD = 0,
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i_PD = 0,
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i_SP = 1,
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i_SP = 1,
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i_D = i,
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i_D = i,
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@ -213,7 +213,7 @@ class LatticeNXSDRInput:
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class LatticeNXSDROutputImpl(Module):
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class LatticeNXSDROutputImpl(Module):
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def __init__(self, i, o, clk):
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def __init__(self, i, o, clk):
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self.specials += Instance("OFD1P3BX",
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self.specials += Instance("OFD1P3BX",
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i_SCLK = clk,
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i_CK = clk,
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i_PD = 0,
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i_PD = 0,
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i_SP = 1,
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i_SP = 1,
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i_D = i,
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i_D = i,
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