Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

wishbone: add missing SEL

This commit is contained in:
Sebastien Bourdeauducq 2011-12-08 19:09:32 +01:00
parent ed05ec5f6a
commit 5720a51dad
1 changed files with 1 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
migen/bus/wishbone.py
View File

@ -5,6 +5,7 @@ _desc = [
(True, "adr", 32), (True, "adr", 32),
(True, "dat", 32), (True, "dat", 32),
(False, "dat", 32), (False, "dat", 32),
(True, "sel", 4),
(True, "cyc", 1), (True, "cyc", 1),
(True, "stb", 1), (True, "stb", 1),
(False, "ack", 1), (False, "ack", 1),