framebuffer: indentation

This commit is contained in:
Sebastien Bourdeauducq 2012-07-01 22:30:07 +02:00
parent e2463da787
commit 59289cfa3b
1 changed files with 14 additions and 13 deletions

View File

@ -187,19 +187,20 @@ class FIFO(Actor):
], ],
clkport="clk_write") clkport="clk_write")
t = self.token("dac") t = self.token("dac")
return Fragment([ return Fragment(
asfifo.ins["read_en"].eq(1), [
asfifo.ins["read_en"].eq(1),
self.endpoints["dac"].ack.eq(~asfifo.outs["full"]),
asfifo.ins["write_en"].eq(self.endpoints["dac"].stb), self.endpoints["dac"].ack.eq(~asfifo.outs["full"]),
asfifo.ins["data_in"].eq(Cat(~t.hsync, ~t.vsync, t.r, t.g, t.b)), asfifo.ins["write_en"].eq(self.endpoints["dac"].stb),
asfifo.ins["data_in"].eq(Cat(~t.hsync, ~t.vsync, t.r, t.g, t.b)),
self.busy.eq(0),
asfifo.ins["rst"].eq(0) self.busy.eq(0),
], [ asfifo.ins["rst"].eq(0)
Cat(self.vga_hsync_n, self.vga_vsync_n, self.vga_r, self.vga_g, self.vga_b).eq(asfifo.outs["data_out"]) ], [
], Cat(self.vga_hsync_n, self.vga_vsync_n, self.vga_r, self.vga_g, self.vga_b).eq(asfifo.outs["data_out"])
instances=[asfifo]) ],
instances=[asfifo])
class FakeDMA(Actor): class FakeDMA(Actor):
def __init__(self, port): def __init__(self, port):