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litex_sim: Rework Makefiles to put output files in gateware directory.

This commit is contained in:
Tim 'mithro' Ansell 2020-04-11 18:26:15 -07:00
parent a0658421cc
commit 5a0bb6ee01
11 changed files with 50 additions and 63 deletions
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9
litex/build/sim/core/Makefile
View File

@ -29,11 +29,11 @@ all: modules sim
mkdir:
mkdir -p $(OBJ_DIR)
$(OBJS_SIM): %.o: $(SRC_DIR)/%.c
$(OBJS_SIM): %.o: $(SRC_DIR)/%.c | mkdir
$(CC) -c $(CFLAGS) -o $(OBJ_DIR)/$@ $<
.PHONY: sim
sim: mkdir $(OBJS_SIM)
sim: $(OBJS_SIM) | mkdir
verilator -Wno-fatal -O3 $(CC_SRCS) --top-module dut --exe \
-DPRINTF_COND=0 \
$(SRCS_SIM_CPP) $(OBJS_SIM) \
@ -51,8 +51,9 @@ sim: mkdir $(OBJS_SIM)
make -j -C $(OBJ_DIR) -f Vdut.mk Vdut
.PHONY: modules
modules: mkdir
$(MAKE) -C $(MOD_DIR)
modules:
mkdir modules
$(MAKE) -C modules -f $(MOD_DIR)/Makefile
.PHONY: clean
clean:

6
litex/build/sim/core/modules/Makefile
View File

@ -1,11 +1,13 @@
include ../variables.mak
MODULES = xgmii_ethernet ethernet serial2console serial2tcp clocker
SHROBJS = $(MODULES:=.so)
.PHONY: $(MODULES)
all: $(MODULES)
$(MODULES): %:
$(MAKE) -C $@
mkdir -p $@
$(MAKE) MOD=$@ -C $@ -f $(SRC_DIR)/modules/$@/Makefile
cp $@/$@.so $@.so
.PHONY: clean
clean:

7
litex/build/sim/core/modules/clocker/Makefile
View File

@ -1,5 +1,2 @@
include ../variables.mak
all: $(OBJ_DIR)/clocker.so
include ../rules.mak
include ../../variables.mak
include $(SRC_DIR)/modules/rules.mak

16
litex/build/sim/core/modules/ethernet/Makefile
View File

@ -1,22 +1,20 @@
include ../variables.mak
CFLAGS += -Itapcfg/src/include
include ../../variables.mak
UNAME_S := $(shell uname -s)
all: $(OBJ_DIR)/ethernet.so
include $(SRC_DIR)/modules/rules.mak
include ../rules.mak
CFLAGS += -I$(MOD_SRC_DIR)/tapcfg/src/include
OBJS = $(MOD).o tapcfg.o taplog.o
OBJS = $(addprefix $(OBJ_DIR)/, ethernet.o tapcfg.o taplog.o)
$(OBJ_DIR)/ethernet.so: $(OBJS)
$(MOD).so: $(OBJS)
ifeq ($(UNAME_S),Darwin)
$(CC) $(LDFLAGS) -o $@ $^
else
$(CC) $(LDFLAGS) -Wl,-soname,$@ -o $@ $^
endif
$(OBJ_DIR)/tapcfg.o: tapcfg/src/lib/tapcfg.c
tapcfg.o: $(MOD_SRC_DIR)/tapcfg/src/lib/tapcfg.c
$(CC) $(CFLAGS) -c -o $@ $<
$(OBJ_DIR)/taplog.o: tapcfg/src/lib/taplog.c
taplog.o: $(MOD_SRC_DIR)/tapcfg/src/lib/taplog.c
$(CC) $(CFLAGS) -c -o $@ $<

7
litex/build/sim/core/modules/jtagremote/Makefile
View File

@ -1,5 +1,2 @@
include ../variables.mak
all: $(OBJ_DIR)/jtagremote.so
include ../rules.mak
include ../../variables.mak
include $(SRC_DIR)/modules/rules.mak

22
litex/build/sim/core/modules/rules.mak
View File

@ -1,9 +1,23 @@
CC ?= gcc
UNAME_S := $(shell uname -s)
$(OBJ_DIR)/%.o: %.c
$(CC) -c $(CFLAGS) -I../.. -o $@ $<
ifeq ($(UNAME_S),Darwin)
CFLAGS += -I/usr/local/include/
LDFLAGS += -L/usr/local/lib -ljson-c
CFLAGS += -Wall -O3 -ggdb -fPIC
else
CFLAGS += -Wall -O3 -ggdb -fPIC -Werror
endif
LDFLAGS += -levent -shared -fPIC
$(OBJ_DIR)/%.so: $(OBJ_DIR)/%.o
MOD_SRC_DIR=$(SRC_DIR)/modules/$(MOD)
all: $(MOD).so
%.o: $(MOD_SRC_DIR)/%.c
$(CC) -c $(CFLAGS) -I$(MOD_SRC_DIR)/../.. -o $@ $<
%.so: %.o
ifeq ($(UNAME_S),Darwin)
$(CC) $(LDFLAGS) -o $@ $^
else
@ -12,4 +26,4 @@ endif
.PHONY: clean
clean:
rm -f $(OBJ_DIR)/*.o $(OBJ_DIR)/*.so
rm -f *.o *.so

7
litex/build/sim/core/modules/serial2console/Makefile
View File

@ -1,5 +1,2 @@
include ../variables.mak
all: $(OBJ_DIR)/serial2console.so
include ../rules.mak
include ../../variables.mak
include $(SRC_DIR)/modules/rules.mak

7
litex/build/sim/core/modules/serial2tcp/Makefile
View File

@ -1,5 +1,2 @@
include ../variables.mak
all: $(OBJ_DIR)/serial2tcp.so
include ../rules.mak
include ../../variables.mak
include $(SRC_DIR)/modules/rules.mak

13
litex/build/sim/core/modules/variables.mak
View File

@ -1,13 +0,0 @@
CC ?= gcc
UNAME_S := $(shell uname -s)
ifeq ($(UNAME_S),Darwin)
CFLAGS += -I/usr/local/include/
LDFLAGS += -L/usr/local/lib -ljson-c
CFLAGS += -Wall -O3 -ggdb -fPIC
else
CFLAGS += -Wall -O3 -ggdb -fPIC -Werror
endif
LDFLAGS += -levent -shared -fPIC
OBJ_DIR ?= .

16
litex/build/sim/core/modules/xgmii_ethernet/Makefile
View File

@ -1,22 +1,20 @@
include ../variables.mak
CFLAGS += -Itapcfg/src/include
include ../../variables.mak
UNAME_S := $(shell uname -s)
all: $(OBJ_DIR)/xgmii_ethernet.so
include $(SRC_DIR)/modules/rules.mak
include ../rules.mak
CFLAGS += -I$(MOD_SRC_DIR)/tapcfg/src/include
OBJS = $(MOD).o tapcfg.o taplog.o
OBJS = $(addprefix $(OBJ_DIR)/, xgmii_ethernet.o tapcfg.o taplog.o)
$(OBJ_DIR)/xgmii_ethernet.so: $(OBJS)
$(MOD).so: $(OBJS)
ifeq ($(UNAME_S),Darwin)
$(CC) $(LDFLAGS) -o $@ $^
else
$(CC) $(LDFLAGS) -Wl,-soname,$@ -o $@ $^
endif
$(OBJ_DIR)/tapcfg.o: tapcfg/src/lib/tapcfg.c
tapcfg.o: $(MOD_SRC_DIR)/tapcfg/src/lib/tapcfg.c
$(CC) $(CFLAGS) -c -o $@ $<
$(OBJ_DIR)/taplog.o: tapcfg/src/lib/taplog.c
taplog.o: $(MOD_SRC_DIR)/tapcfg/src/lib/taplog.c
$(CC) $(CFLAGS) -c -o $@ $<

3
litex/build/sim/verilator.py
View File

@ -125,7 +125,6 @@ def _build_sim(build_name, sources, threads, coverage, opt_level="O3", trace_fst
build_script_contents = """\
rm -rf obj_dir/
make -C . -f {} {} {} {} {} {}
mkdir -p modules && cp obj_dir/*.so modules
""".format(makefile,
"CC_SRCS=\"{}\"".format("".join(cc_srcs)),
"THREADS={}".format(threads) if int(threads) > 1 else "",
@ -217,4 +216,4 @@ class SimVerilatorToolchain:
os.chdir("../../")
if build:
return top_output.ns
return top_output.ns