targets/nexys_video: generate clk100

2019-08-27 14:06:13 +02:00 · 2019-08-27 14:06:13 +02:00 · 5a7b4c3406
parent c179741cf3
commit 5a7b4c3406
1 changed files with 1 additions and 0 deletions
--- a/litex/boards/targets/nexys_video.py
+++ b/litex/boards/targets/nexys_video.py
@ -42,6 +42,7 @@ class _CRG(Module):
        pll.create_clkout(self.cd_sys4x, 4*sys_clk_freq)
        pll.create_clkout(self.cd_sys4x_dqs, 4*sys_clk_freq, phase=90)
        pll.create_clkout(self.cd_clk200, 200e6)
+        pll.create_clkout(self.cd_clk100, 100e6)

        self.submodules.idelayctrl = S7IDELAYCTRL(self.cd_clk200)