soc: cosmetic: reduce horizontal indentation in IRQ init.
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@ -1047,20 +1047,19 @@ class SoC(Module):
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raise
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# SoC IRQ Interconnect ---------------------------------------------------------------------
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if hasattr(self, "cpu"):
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if hasattr(self.cpu, "interrupt"):
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for name, loc in sorted(self.irq.locs.items()):
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if name in self.cpu.interrupts.keys():
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continue
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if hasattr(self, name):
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module = getattr(self, name)
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if not hasattr(module, "ev"):
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self.logger.error("EventManager {} in {} SubModule.".format(
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colorer("not found", color="red"),
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colorer(name)))
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raise
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self.comb += self.cpu.interrupt[loc].eq(module.ev.irq)
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self.add_constant(name + "_INTERRUPT", loc)
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if hasattr(self, "cpu") and hasattr(self.cpu, "interrupt"):
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for name, loc in sorted(self.irq.locs.items()):
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if name in self.cpu.interrupts.keys():
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continue
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if hasattr(self, name):
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module = getattr(self, name)
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if not hasattr(module, "ev"):
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self.logger.error("EventManager {} in {} SubModule.".format(
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colorer("not found", color="red"),
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colorer(name)))
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raise
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self.comb += self.cpu.interrupt[loc].eq(module.ev.irq)
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self.add_constant(name + "_INTERRUPT", loc)
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# SoC build ------------------------------------------------------------------------------------
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def build(self, *args, **kwargs):
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