Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

soc: cosmetic: reduce horizontal indentation in IRQ init.

This commit is contained in:
Gabriel Somlo 2020-11-30 16:28:40 -05:00
parent 9af56cf247
commit 5cc3db0176
1 changed files with 13 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
litex/soc/integration/soc.py
View File

@ -1047,8 +1047,7 @@ class SoC(Module):
raise
# SoC IRQ Interconnect ---------------------------------------------------------------------
if hasattr(self, "cpu"):
if hasattr(self.cpu, "interrupt"):
if hasattr(self, "cpu") and hasattr(self.cpu, "interrupt"):
for name, loc in sorted(self.irq.locs.items()):
if name in self.cpu.interrupts.keys():
continue