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liteeth: do not insert CRC/Preamble in simulation to allow direct connection to ethernet tap
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1 changed files with 5 additions and 1 deletions
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@ -1,6 +1,7 @@
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.generic import *
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from misoclib.com.liteeth.mac.core import gap, preamble, crc, padding, last_be
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from misoclib.com.liteeth.phy.sim import LiteEthPHYSim
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class LiteEthMACCore(Module, AutoCSR):
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def __init__(self, phy, dw, endianness="big", with_hw_preamble_crc=True):
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@ -20,8 +21,11 @@ class LiteEthMACCore(Module, AutoCSR):
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rx_pipeline += [rx_gap_checker]
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# Preamble / CRC
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if with_hw_preamble_crc:
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if isinstance(phy, LiteEthPHYSim):
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# In simulation, avoid CRC/Preamble to enable direct connection
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# to the Ethernet tap.
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self._hw_preamble_crc = CSRStatus(reset=1)
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elif with_hw_preamble_crc:
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# Preamble insert/check
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preamble_inserter = preamble.LiteEthMACPreambleInserter(phy.dw)
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preamble_checker = preamble.LiteEthMACPreambleChecker(phy.dw)
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