Merge pull request #416 from enjoy-digital/csr_svd
Add SVD export capability to Builder (csr_svd parameter) and targets …
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enjoy-digital
GitHub
commit
5ded144762
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@ -32,7 +32,7 @@ def generate_svd(soc, buildpath, filename=None, name="soc", **kwargs):
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filename = name + ".svd"
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kwargs["name"] = name
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with open(buildpath + "/" + filename, "w", encoding="utf-8") as svd:
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svd.write(export.get_svd(soc, **kwargs))
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svd.write(export.get_csr_svd(soc, **kwargs))
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def generate_docs(soc, base_dir,
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@ -14,7 +14,7 @@ import struct
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import shutil
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from litex.build.tools import write_to_file
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from litex.soc.integration import cpu_interface, soc_core
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from litex.soc.integration import export, soc_core
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__all__ = ["soc_software_packages", "soc_directory",
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"Builder", "builder_args", "builder_argdict"]
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@ -45,7 +45,8 @@ class Builder:
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compile_software = True,
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compile_gateware = True,
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csr_json = None,
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csr_csv = None):
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csr_csv = None,
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csr_svd = None):
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self.soc = soc
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# From Python doc: makedirs() will become confused if the path
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@ -60,6 +61,7 @@ class Builder:
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self.compile_gateware = compile_gateware
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self.csr_csv = csr_csv
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self.csr_json = csr_json
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self.csr_svd = csr_svd
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self.software_packages = []
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for name in soc_software_packages:
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@ -79,7 +81,7 @@ class Builder:
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def define(k, v):
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variables_contents.append("{}={}\n".format(k, _makefile_escape(v)))
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for k, v in cpu_interface.get_cpu_mak(self.soc.cpu, self.compile_software):
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for k, v in export.get_cpu_mak(self.soc.cpu, self.compile_software):
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define(k, v)
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# Distinguish between LiteX and MiSoC.
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define("LITEX", "1")
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@ -106,25 +108,25 @@ class Builder:
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"".join(variables_contents))
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write_to_file(
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os.path.join(self.generated_dir, "output_format.ld"),
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cpu_interface.get_linker_output_format(self.soc.cpu))
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export.get_linker_output_format(self.soc.cpu))
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write_to_file(
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os.path.join(self.generated_dir, "regions.ld"),
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cpu_interface.get_linker_regions(self.soc.mem_regions))
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export.get_linker_regions(self.soc.mem_regions))
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write_to_file(
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os.path.join(self.generated_dir, "mem.h"),
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cpu_interface.get_mem_header(self.soc.mem_regions))
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export.get_mem_header(self.soc.mem_regions))
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write_to_file(
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os.path.join(self.generated_dir, "soc.h"),
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cpu_interface.get_soc_header(self.soc.constants))
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export.get_soc_header(self.soc.constants))
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write_to_file(
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os.path.join(self.generated_dir, "csr.h"),
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cpu_interface.get_csr_header(self.soc.csr_regions,
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export.get_csr_header(self.soc.csr_regions,
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self.soc.constants)
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)
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write_to_file(
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os.path.join(self.generated_dir, "git.h"),
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cpu_interface.get_git_header()
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export.get_git_header()
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)
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if hasattr(self.soc, "sdram"):
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@ -134,23 +136,28 @@ class Builder:
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self.soc.sdram.controller.settings.phy,
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self.soc.sdram.controller.settings.timing))
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def _generate_csr_map(self, csr_json=None, csr_csv=None):
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if csr_json is not None:
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csr_dir = os.path.dirname(os.path.realpath(csr_json))
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def _generate_csr_map(self):
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if self.csr_json is not None:
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csr_dir = os.path.dirname(os.path.realpath(self.csr_json))
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os.makedirs(csr_dir, exist_ok=True)
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write_to_file(csr_json, cpu_interface.get_csr_json(self.soc.csr_regions, self.soc.constants, self.soc.mem_regions))
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write_to_file(self.csr_json, export.get_csr_json(self.soc.csr_regions, self.soc.constants, self.soc.mem_regions))
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if csr_csv is not None:
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csr_dir = os.path.dirname(os.path.realpath(csr_csv))
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if self.csr_csv is not None:
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csr_dir = os.path.dirname(os.path.realpath(self.csr_csv))
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os.makedirs(csr_dir, exist_ok=True)
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write_to_file(csr_csv, cpu_interface.get_csr_csv(self.soc.csr_regions, self.soc.constants, self.soc.mem_regions))
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write_to_file(self.csr_csv, export.get_csr_csv(self.soc.csr_regions, self.soc.constants, self.soc.mem_regions))
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def _prepare_software(self):
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if self.csr_svd is not None:
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svd_dir = os.path.dirname(os.path.realpath(self.csr_svd))
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os.makedirs(svd_dir, exist_ok=True)
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write_to_file(self.csr_svd, export.get_csr_svd(self.soc))
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def _prepare_rom_software(self):
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for name, src_dir in self.software_packages:
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dst_dir = os.path.join(self.software_dir, name)
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os.makedirs(dst_dir, exist_ok=True)
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def _generate_software(self, compile_bios=True):
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def _generate_rom_software(self, compile_bios=True):
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for name, src_dir in self.software_packages:
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if name == "bios" and not compile_bios:
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pass
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@ -160,7 +167,7 @@ class Builder:
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if self.compile_software:
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subprocess.check_call(["make", "-C", dst_dir, "-f", makefile])
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def _initialize_rom(self):
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def _initialize_rom_software(self):
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bios_file = os.path.join(self.software_dir, "bios", "bios.bin")
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bios_data = soc_core.get_mem_data(bios_file, self.soc.cpu.endianness)
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self.soc.initialize_rom(bios_data)
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@ -173,14 +180,13 @@ class Builder:
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self.soc.finalize()
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self._generate_includes()
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self._generate_csr_map()
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if self.soc.cpu_type is not None:
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self._prepare_software()
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self._generate_software(not self.soc.integrated_rom_initialized)
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self._prepare_rom_software()
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self._generate_rom_software(not self.soc.integrated_rom_initialized)
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if self.soc.integrated_rom_size and self.compile_software:
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if not self.soc.integrated_rom_initialized:
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self._initialize_rom()
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self._generate_csr_map(self.csr_json, self.csr_csv)
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self._initialize_rom_software()
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if "run" not in kwargs:
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kwargs["run"] = self.compile_gateware
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@ -214,6 +220,9 @@ def builder_args(parser):
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parser.add_argument("--csr-json", default=None,
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help="store CSR map in JSON format into the "
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"specified file")
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parser.add_argument("--csr-svd", default=None,
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help="store CSR map in SVD format into the "
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"specified file")
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def builder_argdict(args):
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@ -227,4 +236,5 @@ def builder_argdict(args):
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"compile_gateware": not args.no_compile_gateware,
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"csr_csv": args.csr_csv,
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"csr_json": args.csr_json,
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"csr_svd": args.csr_svd,
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}
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@ -281,7 +281,7 @@ def get_csr_csv(csr_regions={}, constants={}, mem_regions={}):
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# SVD Export --------------------------------------------------------------------------------------
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def get_svd(soc, vendor="litex", name="soc", description=None):
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def get_csr_svd(soc, vendor="litex", name="soc", description=None):
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def sub_csr_bit_range(busword, csr, offset):
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nwords = (csr.size + busword - 1)//busword
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i = nwords - offset - 1
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@ -337,17 +337,12 @@ def get_svd(soc, vendor="litex", name="soc", description=None):
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interrupts[csr] = irq
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documented_regions = []
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raw_regions = []
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if hasattr(soc, "get_csr_regions"):
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raw_regions = soc.get_csr_regions()
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else:
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for region_name, region in soc.csr_regions.items():
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raw_regions.append((region_name, region.origin,
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region.busword, region.obj))
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for csr_region in raw_regions:
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for name, region in soc.csr.regions.items():
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documented_regions.append(DocumentedCSRRegion(
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csr_region, csr_data_width=soc.csr_data_width))
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name = name,
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region = region,
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csr_data_width = soc.csr.data_width)
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)
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svd = []
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svd.append('<?xml version="1.0" encoding="utf-8"?>')
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