tools/litex_sim_new: switch to dynamically allocated ethmac origin

2020-02-10 19:37:53 +01:00 · 2020-02-10 19:37:53 +01:00 · 5e11e8391f
parent dd0c71d7a1
commit 5e11e8391f
1 changed files with 1 additions and 1 deletions
--- a/litex/tools/litex_sim_new.py
+++ b/litex/tools/litex_sim_new.py
@ -213,7 +213,7 @@ class SimSoC(SoCCore):
                interface  = "wishbone",
                endianness = self.cpu.endianness)
            self.submodules.ethmac = ethmac
-            self.bus.add_slave("ethmac", self.ethmac.bus, SoCRegion(origin=0xb0000000, size=0x2000, cached=False))
+            self.bus.add_slave("ethmac", self.ethmac.bus, SoCRegion(size=0x2000, cached=False))
            self.csr.add("ethmac")
            self.irq.add("ethmac")