test/test_packet: add randomness on ready output, fix corner-cases on Packetizer/Depacketizer
This commit is contained in:
parent
9642893371
commit
6059712794
|
@ -238,7 +238,7 @@ class Packetizer(Module):
|
|||
)
|
||||
)
|
||||
header_offset_multiplier = 1 if header_words == 1 else 2
|
||||
self.sync += If(sink.ready, sink_d.eq(sink))
|
||||
self.sync += If(source.ready, sink_d.eq(sink))
|
||||
fsm.act("UNALIGNED-DATA-COPY",
|
||||
source.valid.eq(sink.valid | sink_d.last),
|
||||
source.last.eq(sink_d.last),
|
||||
|
@ -249,7 +249,7 @@ class Packetizer(Module):
|
|||
),
|
||||
source.data[header_leftover*8:].eq(sink.data),
|
||||
If(source.valid & source.ready,
|
||||
sink.ready.eq(1),
|
||||
sink.ready.eq(~source.last),
|
||||
NextValue(fsm_from_idle, 0),
|
||||
If(source.last,
|
||||
NextState("IDLE")
|
||||
|
@ -339,11 +339,11 @@ class Depacketizer(Module):
|
|||
)
|
||||
)
|
||||
)
|
||||
self.sync += If(sink.valid & sink.ready, sink_d.eq(sink))
|
||||
self.sync += If(sink.ready, sink_d.eq(sink))
|
||||
fsm.act("UNALIGNED-DATA-COPY",
|
||||
source.valid.eq((sink.valid & ~fsm_from_idle) | no_payload),
|
||||
source.last.eq(sink.last | no_payload),
|
||||
sink.ready.eq(source.ready),
|
||||
sink.ready.eq(source.ready | fsm_from_idle),
|
||||
If(sink.valid & sink.ready,
|
||||
NextValue(fsm_from_idle, 0),
|
||||
If(fsm_from_idle,
|
||||
|
|
|
@ -74,16 +74,21 @@ class TestPacket(unittest.TestCase):
|
|||
while prng.randrange(100) < valid_rand:
|
||||
yield
|
||||
|
||||
def checker(dut):
|
||||
def checker(dut, ready_rand=50):
|
||||
dut.header_errors = 0
|
||||
dut.data_errors = 0
|
||||
dut.last_errors = 0
|
||||
# Receive and check packets
|
||||
yield dut.source.ready.eq(1)
|
||||
for packet in packets:
|
||||
for n, data in enumerate(packet.datas):
|
||||
yield dut.source.ready.eq(0)
|
||||
yield
|
||||
while (yield dut.source.valid) == 0:
|
||||
yield
|
||||
while prng.randrange(100) < ready_rand:
|
||||
yield
|
||||
yield dut.source.ready.eq(1)
|
||||
yield
|
||||
for field in ["field_8b", "field_16b", "field_32b", "field_64b", "field_128b"]:
|
||||
if (yield getattr(dut.source, field)) != packet.header[field]:
|
||||
dut.header_errors += 1
|
||||
|
@ -93,7 +98,6 @@ class TestPacket(unittest.TestCase):
|
|||
if ((yield dut.source.last) != (n == (len(packet.datas) - 1))):
|
||||
dut.last_errors += 1
|
||||
yield
|
||||
yield
|
||||
|
||||
class DUT(Module):
|
||||
def __init__(self):
|
||||
|
|
Loading…
Reference in New Issue