Merge pull request #2030 from trabucayre/gowin_build_gw5a_primitives
build/gowin/common.py: re-add tristate impl and SDRxxx for GW5A/Arora family (required for SDRAM use)
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commit
6309f30e0b
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@ -100,9 +100,19 @@ class GowinDifferentialOutput:
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def lower(dr):
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def lower(dr):
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return GowinDifferentialOutputImpl(dr.i, dr.o_p, dr.o_n)
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return GowinDifferentialOutputImpl(dr.i, dr.o_p, dr.o_n)
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# Gowin Tristate -----------------------------------------------------------------------------------
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# Gowin Special Overrides --------------------------------------------------------------------------
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class GowinTristateImpl(Module):
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gowin_special_overrides = {
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AsyncResetSynchronizer: GowinAsyncResetSynchronizer,
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DDRInput: GowinDDRInput,
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DDROutput: GowinDDROutput,
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DifferentialInput: GowinDifferentialInput,
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DifferentialOutput: GowinDifferentialOutput,
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}
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# Gw5A Tristate ------------------------------------------------------------------------------------
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class Gw5ATristateImpl(Module):
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def __init__(self, io, o, oe, i):
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def __init__(self, io, o, oe, i):
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nbits, _ = value_bits_sign(io)
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nbits, _ = value_bits_sign(io)
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for bit in range(nbits):
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for bit in range(nbits):
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@ -113,18 +123,74 @@ class GowinTristateImpl(Module):
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i_OEN = ~oe,
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i_OEN = ~oe,
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)
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)
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class GowinTristate:
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class Gw5ATristate:
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@staticmethod
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@staticmethod
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def lower(dr):
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def lower(dr):
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return GowinTristateImpl(dr.target, dr.o, dr.oe, dr.i)
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return Gw5ATristateImpl(dr.target, dr.o, dr.oe, dr.i)
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# Gowin Special Overrides --------------------------------------------------------------------------
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# Gw5A SDROutput -----------------------------------------------------------------------------------
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gowin_special_overrides = {
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class Gw5ASDROutputImpl(Module):
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AsyncResetSynchronizer: GowinAsyncResetSynchronizer,
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def __init__(self, i, o, clk):
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DDRInput: GowinDDRInput,
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self.specials += Instance("DFFSE",
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DDROutput: GowinDDROutput,
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i_D = i,
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DifferentialInput: GowinDifferentialInput,
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o_Q = o,
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DifferentialOutput: GowinDifferentialOutput,
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i_CLK = clk,
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#Tristate: GowinTristate, # FIXME: issue with tangNano9k hyperram
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i_SET = Constant(0,1),
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i_CE = Constant(1,1),
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)
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class Gw5ASDROutput:
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@staticmethod
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def lower(dr):
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return Gw5ASDROutputImpl(dr.i, dr.o, dr.clk)
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# Gw5A SDRInput ------------------------------------------------------------------------------------
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class Gw5ASDRInputImpl(Module):
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def __init__(self, i, o, clk):
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self.specials += Instance("DFFSE",
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i_D = i,
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o_Q = o,
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i_CLK = clk,
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i_SET = Constant(0,1),
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i_CE = Constant(1,1),
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)
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class Gw5ASDRInput:
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@staticmethod
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def lower(dr):
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return Gw5ASDRInputImpl(dr.i, dr.o, dr.clk)
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# Gw5A SDRTristate ---------------------------------------------------------------------------------
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class Gw5ASDRTristateImpl(Module):
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def __init__(self, io, o, oe, i, clk):
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_o = Signal()
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_oe_n = Signal()
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_i = Signal()
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self.specials += [
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SDROutput(o, _o, clk),
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SDROutput(~oe, _oe_n, clk),
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SDRInput(_i, i, clk),
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Instance("IOBUF",
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io_IO = io,
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o_O = _i,
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i_I = _o,
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i_OEN = _oe_n,
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),
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]
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class Gw5ASDRTristate:
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@staticmethod
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def lower(dr):
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return Gw5ASDRTristateImpl(dr.io, dr.o, dr.oe, dr.i, dr.clk)
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# Gw5A Special Overrides ---------------------------------------------------------------------------
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gw5a_special_overrides = {
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SDRTristate: Gw5ASDRTristate,
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SDROutput: Gw5ASDROutput,
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SDRInput: Gw5ASDRInput,
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Tristate: Gw5ATristate,
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}
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}
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@ -34,6 +34,8 @@ class GowinPlatform(GenericPlatform):
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def get_verilog(self, *args, special_overrides=dict(), **kwargs):
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def get_verilog(self, *args, special_overrides=dict(), **kwargs):
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so = dict(common.gowin_special_overrides)
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so = dict(common.gowin_special_overrides)
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if self.device[:4] == "GW5A":
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so.update(common.gw5a_special_overrides)
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so.update(special_overrides)
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so.update(special_overrides)
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return GenericPlatform.get_verilog(self, *args,
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return GenericPlatform.get_verilog(self, *args,
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special_overrides = so,
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special_overrides = so,
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