Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #1564 from antmicro/msieron/fix-write-leveling-for-x4 

software/liblitedram: fix write leveling for x4 modules
This commit is contained in:
enjoy-digital 2023-01-12 12:49:32 +01:00 committed by GitHub
parent f386f4a2a5 881bdbbbef
commit 63169aa5db
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 8 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
litex/soc/software/liblitedram/sdram.c
View File

@ -644,7 +644,14 @@ static int sdram_write_leveling_scan(int *delays, int loops, int show)
cdelay(100);
csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr(0), buf, DFII_PIX_DATA_BYTES);
#if SDRAM_PHY_DQ_DQS_RATIO == 4
if (buf[SDRAM_PHY_MODULES-1-(i/2)] != 0)
/* For x4 memories, we need to test individual nibbles, not bytes */
/* Extract the byte containing the nibble from the tested module */
int module_byte = buf[SDRAM_PHY_MODULES-1-(i/2)];
/* Shift the byte by 4 bits right if the module number is odd */
module_byte >>= 4 * (i % 2);
/* Extract the nibble from the tested module */
if ((module_byte & 0xf) != 0)
#else
if (buf[SDRAM_PHY_MODULES-1-i] != 0)
#endif