soc/cores/cpu/serv: fix crt0 .data initialize
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@ -14,8 +14,8 @@ reset_vector:
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la t1, _edata
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la t1, _edata
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la t2, _fdata_rom
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la t2, _fdata_rom
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1: beq t0, t1, 2f
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1: beq t0, t1, 2f
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lw t3, 0(t0)
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lw t3, 0(t2)
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sw t3, 0(t2)
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sw t3, 0(t0)
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addi t0, t0, 4
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addi t0, t0, 4
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addi t2, t2, 4
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addi t2, t2, 4
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j 1b
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j 1b
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