Revert "add I/O standard definitions to mibuild/altera"
This reverts commit a889b41060
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a889b41060
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'''ALTERA I/O-Standards
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'''
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import collections
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from mibuild.generic_platform import IOStandard
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__all__ = ['IOSTD']
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_LVTTL = collections.namedtuple(
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'V',
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'level1V8 level2V5 level3V0 level3V3')(
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IOStandard('1.8-V'),
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IOStandard('2.5-V'),
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IOStandard('3.0-V LVTTL'),
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IOStandard('3.3-V LVTTL'))
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_LVCMOS = collections.namedtuple(
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'V',
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'level1V2 level1V5 level1V8 level2V5 level3V0 level3V3')(
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IOStandard('1.3 V'),
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IOStandard('1.5 V'),
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IOStandard('1.8 V'),
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IOStandard('2.5 V'),
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IOStandard('3.0-V LVCMOS'),
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IOStandard('3.3-V LVCMOS'))
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_SSTL = collections.namedtuple(
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'V',
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'level1V5ClassI level1V5ClassII '
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'level1V8ClassI level1V8ClassII '
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'level2V0ClassI level2V0ClassII')(
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IOStandard('SSTL-15 Class I'),
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IOStandard('SSTL-15 Class II'),
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IOStandard('SSTL-18 Class I'),
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IOStandard('SSTL-18 Class II'),
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IOStandard('SSTL-2 Class I'),
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IOStandard('SSTL-2 Class II'))
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_HSTL = collections.namedtuple(
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'V',
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'level1V2ClassI level1V2ClassII level1V5ClassI level1V5ClassII '
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'level1V8ClassI level1V8ClassII')(
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IOStandard('1.2-V HSTL Class I'),
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IOStandard('1.2-V HSTL Class II'),
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IOStandard('HSTL Class I'),
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IOStandard('HSTL Class II'),
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IOStandard('1.8-V HSTL Class I'),
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IOStandard('1.8-V HSTL Class II'))
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_DiffSSTL = collections.namedtuple(
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'V',
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'level1V5 level1V8 level2V0')(
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IOStandard('Differential 1.5-V SSTL'),
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IOStandard('Differential 1.8-V SSTL'),
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IOStandard('Differential SSTL-2'))
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_DiffHSTL = collections.namedtuple(
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'V',
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'level1V2 level1V5 level1V8')(
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IOStandard('Differential 1.2-V HSTL'),
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IOStandard('Differential 1.5-V HSTL'),
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IOStandard('Differential 1.8-V HSTL'))
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_PCML = collections.namedtuple(
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'V',
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'level1V2 level1V4 level1V5 level2V5')(
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IOStandard('1.2-V PCML'),
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IOStandard('1.4-V PCML'),
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IOStandard('1.5-V PCML'),
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IOStandard('2.5-V PCML'))
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IOSTD = collections.namedtuple(
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'CONST',
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'LVTTL LVCMOS PCI PCIX SSTL HSTL DiffSSTL DiffHSTL '
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'LVDS RSDS miniLVDS LVPECL DiffLVPECL BLVDS PCML DiffPCML HCSL')(
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_LVTTL,
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_LVCMOS,
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IOStandard('3.0-V PCI'),
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IOStandard('3.0-V PCI-X'),
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_SSTL,
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_HSTL,
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_DiffSSTL,
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_DiffHSTL,
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IOStandard('LVDS'),
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IOStandard('RSDS'),
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IOStandard('mini-LVDS'),
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IOStandard('LVPECL'),
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IOStandard('Differential LVPECL'),
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IOStandard('BLVDS'),
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_PCML,
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IOStandard('Differential PCML'),
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IOStandard('HCSL'))
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