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clock/lattice_ecp5/ECP5PLL: ensure feedback path selected before exiting search

This commit is contained in:
George Hilliard 2021-09-15 00:00:24 -05:00
parent f017b06926
commit 6733a3e3e6
2 changed files with 12 additions and 0 deletions
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3
litex/soc/cores/clock/lattice_ecp5.py
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@ -97,6 +97,9 @@ class ECP5PLL(Module):
break break
if not valid: if not valid:
all_valid = False all_valid = False
if self.nclkouts == self.nclkouts_max and not config["clkfb"]:
# If there is no output suitable for feedback and no spare, not valid
all_valid = False
else: else:
all_valid = False all_valid = False
if all_valid: if all_valid:

9
test/test_clock.py
View File

@ -121,6 +121,15 @@ class TestClock(unittest.TestCase):
pll.expose_dpa() pll.expose_dpa()
pll.compute_config() pll.compute_config()
# Test corner cases that have historically had trouble:
pll = ECP5PLL()
pll.register_clkin(Signal(), 100e6)
pll.create_clkout(ClockDomain("clkout1"), 350e6)
pll.create_clkout(ClockDomain("clkout2"), 350e6)
pll.create_clkout(ClockDomain("clkout3"), 175e6)
pll.create_clkout(ClockDomain("clkout4"), 175e6)
pll.compute_config()
# Lattice / NX # Lattice / NX
def test_nxpll(self): def test_nxpll(self):
pll = NXPLL() pll = NXPLL()