minor cleanup
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@ -162,8 +162,8 @@ class Builder:
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if self.gateware_toolchain_path is not None:
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toolchain_path = self.gateware_toolchain_path
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if 'run' not in kwargs:
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kwargs['run'] = self.compile_gateware
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if "run" not in kwargs:
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kwargs["run"] = self.compile_gateware
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vns = self.soc.build(build_dir=os.path.join(self.output_dir, "gateware"),
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toolchain_path=toolchain_path, **kwargs)
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return vns
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@ -10,7 +10,7 @@ extern "C" {
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// instructions. It also doesn't have a global interrupt enable/disable, so
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// we have to emulate it via saving and restoring a mask and using 0/~1 as a
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// hardware mask.
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// Due to all this somewhat low-level mess, all of the glue is implementein
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// Due to all this somewhat low-level mess, all of the glue is implemented in
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// the RiscV crt0, and this header is kept as a thin wrapper. Since interrupts
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// managed by this layer, do not call interrupt instructions directly, as the
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// state will go out of sync with the hardware.
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