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soc/interconnect/wishbone: allow setting adr_width (default to 30)

This commit is contained in:
Florent Kermarrec 2019-05-02 09:26:39 +02:00
parent 4dccb8a9eb
commit 698bc88296
1 changed files with 3 additions and 2 deletions
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5
litex/soc/interconnect/wishbone.py
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@ -13,7 +13,7 @@ from litex.soc.interconnect import csr
_layout = [ _layout = [
("adr", 30, DIR_M_TO_S), ("adr", "adr_width", DIR_M_TO_S),
("dat_w", "data_width", DIR_M_TO_S), ("dat_w", "data_width", DIR_M_TO_S),
("dat_r", "data_width", DIR_S_TO_M), ("dat_r", "data_width", DIR_S_TO_M),
("sel", "sel_width", DIR_M_TO_S), ("sel", "sel_width", DIR_M_TO_S),
@ -28,8 +28,9 @@ _layout = [
class Interface(Record): class Interface(Record):
def __init__(self, data_width=32): def __init__(self, data_width=32, adr_width=30):
Record.__init__(self, set_layout_parameters(_layout, Record.__init__(self, set_layout_parameters(_layout,
adr_width=adr_width,
data_width=data_width, data_width=data_width,
sel_width=data_width//8)) sel_width=data_width//8))