cores/cpu/gowin_emcu: Switch to LiteX's UART.
A UART does not cost that much ressources and this avoid specific code/allow simplifying support.
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@ -251,14 +251,6 @@ class GowinEMCU(CPU):
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# ---------------------------------
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self.submodules += ahb.AHB2Wishbone(ahb_targexp0, self.pbus)
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def connect_uart(self, pads, n=0):
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assert n in (0, 1), "this CPU has 2 built-in UARTs, 0 and 1"
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self.cpu_params.update({
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f"i_UART{n}RXDI" : pads.rx,
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f"o_UART{n}TXDO" : pads.tx,
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f"o_UART{n}BAUDTICK" : Signal()
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})
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def connect_jtag(self, pads):
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self.cpu_params.update(
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i_DAPSWDITMS = pads.tms,
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@ -19,9 +19,6 @@ void _start(void) {
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for (uint32_t *x = &_fbss; x < &_ebss; x ++)
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*x = 0;
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UART0->ctrl = 0b11; // set rx and tx enable bits
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UART0->baud_div = CONFIG_CLOCK_FREQUENCY / 115200; // FIXME
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__asm__("bl main");
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while(1);
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}
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@ -12,58 +12,6 @@ void flush_l2_cache(void);
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void busy_wait(unsigned int ms);
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void busy_wait_us(unsigned int us);
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#include <stdint.h>
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// FIXME
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#define CSR_UART_BASE
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struct EMCU_UART
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{
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volatile uint32_t data;
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volatile uint32_t state;
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volatile uint32_t ctrl;
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volatile uint32_t int_ctrl;
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volatile uint32_t baud_div;
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};
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#define PERIPHERALS_BASE 0x40000000
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#define UART0 ((struct EMCU_UART *) (PERIPHERALS_BASE + 0x4000))
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static inline char uart_txfull_read(void);
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static inline char uart_rxempty_read(void);
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static inline void uart_ev_enable_write(char c);
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static inline void uart_rxtx_write(char c);
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static inline char uart_rxtx_read(void);
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static inline void uart_ev_pending_write(char);
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static inline char uart_ev_pending_read(void);
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static inline char uart_txfull_read(void) {
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return UART0->state & 0b01;
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}
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static inline char uart_rxempty_read(void) {
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return !(UART0->state & 0b10);
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}
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static inline void uart_ev_enable_write(char c) {
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// FIXME
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}
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static inline void uart_rxtx_write(char c) {
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UART0->data = (uint32_t) c;
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}
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static inline char uart_rxtx_read(void)
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{
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return (char)(UART0->data);
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}
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static inline void uart_ev_pending_write(char x) {}
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static inline char uart_ev_pending_read(void) {
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return 0;
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}
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#ifdef __cplusplus
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}
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#endif
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