soc/cores/cpu/zynq7000/core.py: added GPx tcl configuration
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@ -230,6 +230,16 @@ class Zynq7000(CPU):
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version = "axi3"
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)
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self.axi_gp_masters.append(axi_gpn)
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self.add_ps7_config({
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f"PCW_USE_M_AXI_GP{n}": 1,
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#f"PCW_M_AXI_GP{n}_FREQMHZ": 100, # FIXME: parameter?
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f"PCW_M_AXI_GP{n}_ID_WIDTH": 12,
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f"PCW_M_AXI_GP{n}_ENABLE_STATIC_REMAP": 0,
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f"PCW_M_AXI_GP{n}_SUPPORT_NARROW_BURST": 0,
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f"PCW_M_AXI_GP{n}_THREAD_ID_WIDTH": 12,
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})
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self.cpu_params.update({
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# AXI GP clk.
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f"i_M_AXI_GP{n}_ACLK" : ClockSignal("ps7"),
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