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software/liblitedram: add separators, expose read_level.

This commit is contained in:
Florent Kermarrec 2020-09-03 17:47:32 +02:00
parent ae152e28a7
commit 6d8a367abe
2 changed files with 78 additions and 6 deletions
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44
litex/soc/software/liblitedram/sdram.c
View File

@ -24,6 +24,8 @@
#include "sdram.h"
#ifdef CSR_SDRAM_BASE
__attribute__((unused)) static void cdelay(int i)
{
#ifndef CONFIG_SIM_DISABLE_DELAYS
@ -34,7 +36,9 @@ __attribute__((unused)) static void cdelay(int i)
#endif
}
#ifdef CSR_SDRAM_BASE
/*-----------------------------------------------------------------------*/
/* Constants */
/*-----------------------------------------------------------------------*/
#define DFII_ADDR_SHIFT CONFIG_CSR_ALIGNMENT/8
@ -50,6 +54,10 @@ int sdrfreq(void) {
return SDRAM_PHY_XDR*SDRAM_PHY_PHASES*CONFIG_CLOCK_FREQUENCY;
}
/*-----------------------------------------------------------------------*/
/* Software/Hardware Control */
/*-----------------------------------------------------------------------*/
void sdrsw(void)
{
sdram_dfii_control_write(DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N);
@ -62,6 +70,10 @@ void sdrhw(void)
printf("SDRAM now under hardware control\n");
}
/*-----------------------------------------------------------------------*/
/* Manual Control */
/*-----------------------------------------------------------------------*/
void sdrrow(unsigned int row)
{
if(row == 0) {
@ -173,6 +185,10 @@ void sdrwr(unsigned int addr)
#ifdef CSR_DDRPHY_BASE
/*-----------------------------------------------------------------------*/
/* Write Leveling */
/*-----------------------------------------------------------------------*/
#ifdef SDRAM_PHY_WRITE_LEVELING_CAPABLE
void sdrwlon(void)
{
@ -443,9 +459,12 @@ int write_level(void)
return best_cdly >= 0;
}
#endif /* SDRAM_PHY_WRITE_LEVELING_CAPABLE */
/*-----------------------------------------------------------------------*/
/* Read Leveling */
/*-----------------------------------------------------------------------*/
static void read_delay_rst(int module) {
/* sel module */
ddrphy_dly_sel_write(1 << module);
@ -582,7 +601,7 @@ static int read_level_scan(int module, int bitslip)
return score;
}
static void read_level(int module)
void read_level(int module)
{
unsigned int prv;
unsigned char prs[SDRAM_PHY_PHASES][DFII_PIX_DATA_BYTES];
@ -712,9 +731,6 @@ static void read_level(int module)
#endif /* CSR_SDRAM_BASE */
#ifdef CSR_SDRAM_BASE
#if defined(SDRAM_PHY_WRITE_LEVELING_CAPABLE) || defined(SDRAM_PHY_READ_LEVELING_CAPABLE)
@ -759,6 +775,10 @@ static void read_leveling(void)
}
}
/*-----------------------------------------------------------------------*/
/* Leveling */
/*-----------------------------------------------------------------------*/
int _write_level_cdly_scan = 1;
int sdrlevel(void)
@ -794,6 +814,10 @@ int sdrlevel(void)
}
#endif
/*-----------------------------------------------------------------------*/
/* Calibration */
/*-----------------------------------------------------------------------*/
void sdrcal(void)
{
#ifdef CSR_DDRPHY_BASE
@ -810,6 +834,10 @@ void sdrcal(void)
sdrhw();
}
/*-----------------------------------------------------------------------*/
/* Initialization */
/*-----------------------------------------------------------------------*/
int sdrinit(void)
{
printf("Initializing DRAM @0x%08x...\n", MAIN_RAM_BASE);
@ -841,6 +869,10 @@ int sdrinit(void)
return 1;
}
/*-----------------------------------------------------------------------*/
/* MPR access */
/*-----------------------------------------------------------------------*/
#define MPR0_SEL (0 << 0)
#define MPR1_SEL (1 << 0)
#define MPR2_SEL (2 << 0)

40
litex/soc/software/liblitedram/sdram.h
View File

@ -3,26 +3,66 @@
#include <generated/csr.h>
/*-----------------------------------------------------------------------*/
/* Constants */
/*-----------------------------------------------------------------------*/
int sdrdatabits(void);
int sdrfreq(void);
/*-----------------------------------------------------------------------*/
/* Software/Hardware Control */
/*-----------------------------------------------------------------------*/
void sdrsw(void);
void sdrhw(void);
/*-----------------------------------------------------------------------*/
/* Manual Control */
/*-----------------------------------------------------------------------*/
void sdrrow(unsigned int row);
void sdrrdbuf(int dq);
void sdrrd(unsigned int addr, int dq);
void sdrrderr(int count);
void sdrwr(unsigned int addr);
/*-----------------------------------------------------------------------*/
/* Write Leveling */
/*-----------------------------------------------------------------------*/
void sdrwlon(void);
void sdrwloff(void);
int write_level(void);
/*-----------------------------------------------------------------------*/
/* Read Leveling */
/*-----------------------------------------------------------------------*/
void read_level(int module);
/*-----------------------------------------------------------------------*/
/* Leveling */
/*-----------------------------------------------------------------------*/
int sdrlevel(void);
/*-----------------------------------------------------------------------*/
/* Calibration */
/*-----------------------------------------------------------------------*/
void sdrcal(void);
/*-----------------------------------------------------------------------*/
/* Initialization */
/*-----------------------------------------------------------------------*/
int sdrinit(void);
/*-----------------------------------------------------------------------*/
/* MPR access */
/*-----------------------------------------------------------------------*/
void sdrmrwr(char reg, int value);
void sdrmpron(char mpr);
void sdrmproff(void);